A Digital Signal Recording Module for a Dust Hit Mass Spectrometer
- PDF / 923,927 Bytes
- 5 Pages / 612 x 792 pts (letter) Page_size
- 35 Downloads / 186 Views
ICAL INSTRUMENTS FOR ECOLOGY, MEDICINE, AND BIOLOGY
A Digital Signal Recording Module for a Dust Hit Mass Spectrometer I. V. Piyakova, M. P. Kalaeva, K. I. Sukhacheva, K. E. Voronova, and A. M. Telegina,* a Samara
National Research University, Samara, 443086 Russia *e-mail: [email protected]
Received May 13, 2020; revised May 15, 2020; accepted May 20, 2020
Abstract—The hardware and software parts of the signal registration module for a dust-shock mass spectrometer are described. The module allows one to record the spectrum of an ion pulse with frequencies from 100 to 400 MHz; it uses two 14-bit analog-to-digital converters connected to a programmable logic integrated circuit. In this case, a temporary alternation of analog-to-digital converters is used. The test results of the dustproof mass spectrometer at a microparticle accelerator are given (noise level 0.6% of the amplitude of the measured signal, sampling frequency 200 MHz). DOI: 10.1134/S0020441220060111
INTRODUCTION When designing scientific equipment, one of the common tasks is the high-speed digitization of analog signals from various primary converters (photoelectronic and secondary electronic multipliers, etc.) [1–5]. At the same time, strict requirements can be imposed on the equipment for overall dimensions, power consumption, and the ability to work in an extended range of temperatures and pressures. This article describes a module designed to register a signal in a dust-shock mass spectrometer [6]. The module allows one to record and transmit the ion spectrum recorded at the output of the secondary electron multiplier to a computer with a frequency of up to 200 MHz and a resolution of 14 bits. DESCRIPTION OF THE DEVICE The block diagram of the signal registration module for a dust-shock mass spectrometer is shown in Fig. 1. The structure of the module includes a programmable logic integrated circuit FPGA (Field-Programmable Gate Array); microcontroller MCU (Microcontroller unit); two analog-to-digital converters ADC (Analog-to-Digital Converter) that work in an alternating mode; a programmable differential amplifier PGA (Programmable Gain Amplifiers), a communication device with an external RS-485 computer interface with galvanic isolation; and a supply voltage formation circuit PSS (Power Supply System). Let us consider the alternation mode of the ADC in more detail. In general, such a system may contain sev-
eral ADCs; however, in practice, a variant with two or four channels is usually used. Time interleaving allows the use of several identical ADCs [7] for processing regular sample data series with a higher speed than the working sampling frequency of each individual converter. Temporal rotation consists of temporal multiplexing of a parallel array of M identical ADCs, as shown in Fig. 2, to achieve a higher total sampling rate fs (with sampling period Ts = 1 /fs), even if an ADC has a lower speed: fs/M. Thus, for example, by alternating four 14 bit/100 MHz ADCs they can in principle become a 14 bit/400 MHz ADC. Let us consider the algorithm
Data Loading...
