A generalized symmetrical MLI topology with improved commutation
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ORIGINAL PAPER
A generalized symmetrical MLI topology with improved commutation V. S. Prasadarao K.1 · Sankar Peddapati1 Received: 14 October 2019 / Accepted: 25 June 2020 © Springer-Verlag GmbH Germany, part of Springer Nature 2020
Abstract A generalized symmetrical multilevel inverter (MLI) topology with an essential feature of smooth commutation during the dead time for inductive loads is presented in this paper. It consists of a level generation unit (LGU) and polarity generation unit (PGU); Both LGU and PGU provide a freewheeling path for load current during the dead time for an inductive load which avoids large voltage spikes across the output. This topology can also generate the required number of levels at the output with a minimum number of components. As it requires fewer components, switching losses, installations space, and cost of the implementation are low. In this paper, a seven-level structure derived from the generalized topology is considered for detailed analysis. Further, to show the effectiveness of the proposed MLI topology over the existing symmetrical topologies in overcoming commutation problem, simulations were performed and are validated with experimental results. A comparative study is made in terms of power switches, power diodes, clamping capacitors, and driver circuits between traditional, recent, and proposed topologies. Keywords Multilevel inverter · Renewable energy system · Symmetrical topology · Total harmonic distortion (THD)
1 Introduction With the concern of limited conventional energy sources, increased energy demand, and global warming, interest on alternative energy sources is escalating. Photovoltaic (PV) source among the renewable energy source has gained more attention due to its low maintenance and hassle-free operation. Grid integration of these sources requires an efficient inverter. Conventional H-bridge inverter can perform DC–AC conversion at the cost of higher harmonic content. Pulse-width modulating (PWM) inverters are introduced to reduce the harmonic content in the output. Due to higher switching losses, high dv/dt stress on the power switches, PWM inverters are restricted to the low power applications. To address the above issues, multilevel inverters (MLI) are introduced in the medium and high-power applications. The main features of the MLIs are high-quality staircase output waveform, lower dv/dt stress on the switches, lower EMI. * V. S. Prasadarao K. [email protected] Sankar Peddapati [email protected] 1
Department of Electrical Engineering, NIT Andhra Pradesh, Tadepalligudem, India
Due to these features, MLIs are used in many applications like speed control of induction motor drives, electric vehicles, power conditioning systems, and distributed generation systems. Diode-clamped MLIs (DCMLI) [1–5], Flying capacitor MLIs (FCMLI) [6–8], and Cascaded H-Bridge MLIs (CHBMLI) [9, 10] are the traditional MLIs. The requirement of more diodes in addition to the power switches is the main drawback of the diode clamped MLIs. The drawbacks with the
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