A High-Voltage Hydrogenated Amorphous Silicon Thin-Film Transistor for Reflective Active-Matrix Cholesteric LCD
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Abstract A high-voltage hydrogenated amorphous silicon thin film transistor (H-V a-Si:H TFT) with thick double layer gate insulator (-0.95 gim) has been developed for reflective active-matrix cholesteric liquid crystal displays. The double layer gate insulator consists of 0.85 and 0.10 jim thick benzocyclobutene and hydrogenated amorphous silicon nitride, respectively. This HV a-Si:H TFT operates at the gate-tosource and drain-to-source biases up to 100V without any serious leakage current degradation and device breakdown.
I.
Introduction
The reflective cholesteric liquid crystal display (Ch-LCD) is very attractive device because of its low power consumption, a high brightness, a bistable property, and simple manufacturing. However, the passive-matrix addressing of the Ch-LCD shows a slow image updating speed due to long transition time of the cholesteric liquid crystal (CH-LC). Active-matrix addressing of Ch-LCD should increase the image updating speed. Since the threshold voltage of the homeotropic state of the Ch-LC is high (-30V), high voltage switching devices are needed for active-matrix Ch-LCD [1]. In conventional high voltage a-Si:H TFTs, developed for high-speed printers and scanners, a drain-gate electrode offset region has been introduced (to reduce the electric field across the gate insulator and to prevent its breakdown) [2] [3]. However, such offset region will result in high TFT series resistance leading to a low ON-current and a low ON/OFF-current ratio. Another method to reduce the
electric field across the gate insulator is to increase the gate insulator thickness. In this work, this was achieved by combining a spin-coated thick benzocyclobutene (BCB) with a thin hydrogenated amorphous silicon nitride (a-SiNx:H) deposited by plasma-enhanced chemical vapor deposition (PECVD). In such a device the operating voltages can be extended to large values needed for active-matrix reflective cholesteric liquid crystal display.
II.
Device fabrication
First, Cr metal was deposited on a glass substrate and etched to form the gate electrode and the gate buslines. Then benzocyclobutene (BCB) about 0.85 jtm thick was spin-coated directly over the Cr gate-lines. After spin-coating, the BCB was cured in an N 2 ambient inside a convection oven at 250 °C for 1 hr. Following the BCB curing, hydrogenated amorphous silicon nitride (a-SiN5 :H), hydrogenated amorphous silicon (a-Si:H) and P-doped (n+) a-Si:H films, having thickness of 1000, 2000, and 600 A, respectively, were deposited by PECVD. After the TFT active island patterning, the gate-via was opened by etching both a-SiNx:H and BCB films with the reactive-ion-etching (RIE) method using CF 4 and 02 gas mixture. A 3000 A thick Cr film was used to fabricate source/drain (S/D) electrodes. After wet patterning of the S/D electrodes, the back-channel-etch of n' a-Si:H- and intrinsic a-Si:H layers was done by the RIE method using CF 4 gas. The fabricated a-Si:H TFT had channel width of 116 jim and channel length of 56 jtm; the overlap between the source-, drain- a
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