An Energy-Efficient and Approximate Accelerator Design for Real-Time Canny Edge Detection
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An Energy-Efficient and Approximate Accelerator Design for Real-Time Canny Edge Detection Leonardo Bandeira Soares1 · Julio Oliveira2 · Eduardo Antonio César da Costa2 · Sergio Bampi1 Received: 1 March 2019 / Revised: 3 May 2020 / Accepted: 5 May 2020 © Springer Science+Business Media, LLC, part of Springer Nature 2020
Abstract This paper proposes a dedicated hardware design approach focused on the adoption of state-of-the-art approximate adders (AAs) for the design of CMOS (complementary metal–oxide–semiconductor) Canny edge detection hardware accelerators. The proposed method leverages state-of-the-art AAs in the compute-intensive Gaussian and Gradient filter steps of the Canny edge detection algorithm. The key objectives of our accelerator architecture are: (1) to provide real-time Canny edge operation by proposing an energy-efficient ASIC (application specific integrated circuit) architecture and (2) to further reduce energy consumption when adopting the proposed design-time approach for approximate arithmetic operations. The proposed accelerator architecture considers two methods for the magnitude computation: (1) the square root operator and (2) the absolute operator. All proposed architectures herein developed were described in VHDL and synthesized in a 45 nm digital CMOS ASIC design. Results show that the baseline architecture takes only 0.42 ms to process an 8-bit 512 × 512 pixels image at a maximum VLSI operating frequency of 631 MHz. When considering all the approximate architecture versions and the methods for magnitude computation, the maximum energy reduction achieved is 44.3% when compared to the baseline architecture in an iso-performance analysis. This significant energy reduction is achieved when an average F measure quality metric equal to 0.79 is obtained. Keywords Approximate adders · Gaussian filter · Gradient filter · Real-time image processing · Energy-efficient digital CMOS design
1 Introduction Approximate computing has emerged as a promising design alternative, where several applications can tolerate some loss of image/video quality, while still producing visually acceptable output quality, thus favoring energy-efficient digital designs. The
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Circuits, Systems, and Signal Processing
approximate computing paradigm [9] deals with the issue of energy efficiency by considering that computationally intensive applications, like visual and multimedia signals processing, may not require high arithmetic precision to provide an acceptable end-user interactive experience. In image processing scope, the Canny edge detector is an edge detection operator that uses a multistage algorithm to detect a wide range of edges in images [4]. It is one of the most widely used edge detection algorithms due to its superior performance. On the other hand, this algorithm is more compute-intensive than other edge detection algorithms [32]. According to [24], the compute-intensive nature of the Canny edge algorithm demands high computational pe
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