An Investigation of Silicon Oxide Thin Film by Atomic Layer Deposition
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An Investigation of Silicon Oxide Thin Film by Atomic Layer Deposition Joo-Hyeon Lee1, Chang-Hee Han2, Un-Jung Kim3, Chong-Ook Park4, Sa-Kyun Rha2 and Won-Jun Lee3 1 LSI PA P/J, System LSI Division, Samsung Electronics Co. LTD., Yongin 449-711, Korea 2 Dept. of Materials Engineering, Hanbat National University, Daejeon 305-719, Korea 3 Dept. of Advanced Materials Engineering, Sejong University, Seoul 143-747, Korea 4 Dept. of Materials Sciences and Engineering, KAIST, Daejeon 305-701, Korea. ABSTRACT SiO2 thin films were prepared on p-type Si (100) substrates by atomic layer deposition (ALD) using SiH2Cl2 and O3(1.5 at.%)/O2 as precursors at 300℃. The growth rate of the deposited films increased linearly with increasing amount of simultaneous SiH2Cl2 and O3 exposures, and was saturated at about 0.35 nm/cycle with the reactant exposures of more than 3.6×109 L. A larger amount of O3/O2 than that of SiH2Cl2 was required to obtain a saturated deposition reaction. The composition of the deposited film also varied with O3/O2 exposure at a fixed SiH2Cl2 exposure. The Si/O ratio gradually decreased to 0.5 with increasing amount of O3/O2 exposure. Finally, we also compared the physical and electrical characteristics of the ALD films with those of the films deposited by conventional chemical vapor deposition (CVD) methods. In spite of low process temperature, the SiO2 film prepared by the ALD method was in wet etch rate, surface roughness, leakage current and breakdown voltage superior to that by other several CVD methods.
INTRODUCTION In the upcoming years, continuing miniaturization of the ICs to nanometer dimensions will require new lithography processes with an improved resolution, and new ultrathin film deposition processes with excellent film qualities. The reduction of film thickness to nanometer dimension demands precise control over many film properties, such as thickness uniformity, step coverage, surface roughness, composition, and electrical characteristics. Lower deposition temperatures must also be realized, because interlayer diffusion can degrade the properties of nanoscale devices. Adopting the ALD technique can fulfill many of these requirements. SiO2 has been one of the most widely used dielectric materials in the Si microelectronics processing. Currently, SiO2 films are deposited by low-pressure CVD (LPCVD) at more than 700oC in the IC manufacturing process. However, the high process temperature and poor thickness uniformity of
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ultrathin LPCVD films are expected to be problems in nanoscale ICs in the near future. So ALD is a promising technique for depositing SiO2 films in the processing of next generation ICs. Much research has been recently devoted to developing the ALD method for SiO2 using SiCl4 and H2O as the precursors[1]. The addition of a Lewis base catalyst, such as pyridine[2] or ammonia[3], lowered the deposition temperatures from >600K to 300K and reduced the amount of reactant exposures required for complete surface reactions from >109 L to
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