Analog-to-Digital Conversion Using Single-Layer Integrate-and-Fire Networks with Inhibitory Connections
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Analog-to-Digital Conversion Using Single-Layer Integrate-and-Fire Networks with Inhibitory Connections Brian C. Watson Department of Electrical and Computer Engineering, University of California, San Diego, La Jolla, CA 92093, USA Email: [email protected]
Barry L. Shoop Department of Electrical Engineering and Computer Science, Photonics Research Center, United States Military Academy, West Point, NY 10996, USA Email: [email protected]
Eugene K. Ressler Department of Electrical Engineering and Computer Science, Photonics Research Center, United States Military Academy, West Point, NY 10996, USA Email: [email protected]
Pankaj K. Das Department of Electrical and Computer Engineering, University of California, San Diego, La Jolla, CA 92093, USA Email: [email protected] Received 14 December 2003; Revised 6 April 2004; Recommended for Publication by Peter Handel We discuss a method for increasing the effective sampling rate of binary A/D converters using an architecture that is inspired by biological neural networks. As in biological systems, many relatively simple components can act in concert without a predetermined progression of states or even a timing signal (clock). The charge-fire cycles of individual A/D converters are coordinated using feedback in a manner that suppresses noise in the signal baseband of the power spectrum of output spikes. We have demonstrated that these networks self-organize and that by utilizing the emergent properties of such networks, it is possible to leverage many A/D converters to increase the overall network sampling rate. We present experimental and simulation results for networks of oversampling 1-bit A/D converters arranged in single-layer integrate-and-fire networks with inhibitory connections. In addition, we demonstrate information transmission and preservation through chains of cascaded single-layer networks. Keywords and phrases: spiking neurons, analog-to-digital conversion, integrate-and-fire networks, neuroscience.
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INTRODUCTION
The difficulty of achieving both high-resolution and highspeed analog-to-digital (A/D) conversion continues to be a barrier in the realization of high-speed, high-throughput signal processing systems. Unfortunately, A/D converter improvement has not kept pace with conventional VLSI and, in fact, their performance is approaching a fundamental limit [1]. Transistor switching times restrict the maximum sampling rate of A/D converters. State-of-the-art high-frequency transistors have cutoff frequencies, fT , of 100 GHz or more. Unfortunately, A/D converters cannot operate with multiple bit resolution at the limit of the transistor switching rates due
to parasitic capacitance and the limitations of each architecture. There also exist thermal problems with A/D converters due to the high switching rates and transistor density. Electronic A/D converters with 4-bit resolution and sampling rates of several gigahertz have been achieved [2]. However, the maximum sampling rate for A/D converters with a more useful 14-bit resolution is 100 MHz. Presently
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