Carbon Nanotube-on-Graphene Heterostructures
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https://doi.org/10.1007/s11664-020-08446-7 Ó 2020 The Minerals, Metals & Materials Society
INTERNATIONAL ELECTRON DEVICES AND MATERIALS SYMPOSIUM 2019
Carbon Nanotube-on-Graphene Heterostructures YU ZHENG,1,5 DONGMENG LI,1,6 ZUBAIR AHMED,2,7 JEONGWON PARK,3,8 CHANGJIAN ZHOU,4,9 and CARY Y. YANG
1,10
1.—Center for Nanostructures, Santa Clara University, Santa Clara, CA, USA. 2.—Department of Electronic and Computer Engineering, Hong Kong University of Science and Technology, Kowloon, Hong Kong. 3.—Department of Electrical and Biomedical Engineering, University of Nevada Reno, Reno, NV, USA. 4.—School of Microelectronics, South China University of Technology, Guangzhou, China. 5.—e-mail: [email protected]. 6.—e-mail: [email protected]. 7.—e-mail: [email protected]. 8.—e-mail: [email protected]. 9.—e-mail: [email protected]. 10.—e-mail: [email protected]
This paper presents a brief review of experimental and theoretical studies on a three-dimensional heterostructure consisting of vertical carbon nanotubes (CNTs) connected perpendicularly to a graphene layer. This structure can serve as a potential building block for an all-carbon network in energy storage devices and on-chip interconnects. The review highlights reported works on the fabrication and characterization of such a heterostructure, with focus on the effect of the CNT-graphene interface on electrical conduction. While a direct comparison between experiment and theory is not possible at this time, a brief survey of theoretical efforts based on atomic cluster models nonetheless reveals important knowledge about the electronic transport properties of this all-carbon heterostructure. Key words: Carbon nanotube, graphene, three-dimensional heterostructure, interface, all-carbon network, on-chip interconnect, energy storage device
INTRODUCTION The pre-eminent on-chip interconnect metal, copper (Cu), faces increased reliability challenges in the nanoscale. As the current density approaches or exceeds Cu’s current-carrying capacity of Jmax 2 9 106 A cm 2, breakdown occurs due to electromigration.1–5 This Jmax implies that a 50 nm 9 50 nm Cu via can sustain a current only up to 50 lA, assuming that the current capacity does not degrade from its bulk value, which is unrealistic due to increased defect density in the nanoscale. Further, the resistivity of nanoscale Cu increases with decreasing linewidth due to enhanced surface and grain boundary scatterings.1 Carbon nanomaterials such as graphene and carbon nanotube (CNT), on the other hand, possess current-carrying
(Received July 16, 2020; accepted August 21, 2020)
capacities at least two orders of magnitude higher than that of Cu.6–9 Thus, they have been proposed as materials for horizontal interconnects 10–12 as well as vertical vias.13–17 Work on the characterization of graphene as a horizontal interconnect has been reported,10,12 but the authors did not address how graphene would fit into an overall on-chip interconnect network. On the other hand, although studies have been carried out on CNT vias down to sub-100
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