CdTe Solar Cells: Processing Limits and Defect Chemistry Effects on Open Circuit Voltage
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CdTe Solar Cells: Processing Limits and Defect Chemistry Effects on Open Circuit Voltage Brian E. McCandless1 1 Institute of Energy Conversion, 451 Wyoming Road, University of Delaware, Newark, DE 19716, U.S.A. ABSTRACT The role of CdTe solar cell processing on the defect chemistry that limits open circuit voltage (VOC) is addressed in the thermochemical processing regimes commonly encountered in present-generation CdTe devices. The highest VOC is 0.91 V for a bulk CdTe crystal with ITO which is only marginally higher than VOC = 0.86 V obtained for polycrystalline CdTe films with CdS. Both fall ~0.4 V short of the VOC expected for CdTe, having band gap EG = 1.5 eV. The present >16% efficient superstrate CdTe cell uses a process based on high-temperature, T > 500°C, CdTe growth on CdS, coupled with optimized methods for incorporating oxygen, sulfur, copper, and chloride species in the CdTe film. Pushing cell conversion efficiencies beyond 20% will require increasing VOC beyond 1V. However the present pathway of processing optimization will likely yield VOC and efficiency converging on 0.9 V and 16%, are obtained in a superstrate stack configuration wherein a weakly p-type CdTe film is deposited onto an n-type CdS film4. The CdTe deposition is carried out at a relatively high temperature, >500°C to a thickness of 2-4 μm. The CdS film thickness is typically 16%, have typical parameters: 0.875 V < VOC < 0.825 V; JSC > 26 mA/cm2; and FF > 75%. Current-voltage-temperature analysis of high efficiency CdTe/CdS cells reveals VOC-T intercept equal to the band gap, and diode ideality factor ~1.5 ±0.2, consistent with diode current arising from space-charge recombination through mid-gap states in CdTe, i.e., Shockley-Read-Hall (SRH) recombination7. The CdS free carrier concentration films (~1016 cm-3) is 10-100X more conductive than CdTe films (~5x1014 cm3), with the space-charge region in the CdTe film. Although the CdS heteropartner yields the highest VOC and FF with CdTe, it contributes insignificant photocurrent to the cell, scavenging photons with higher energy that greater than EGCdS = 2.4 eV. Therefore the CdS, necessary to form the electrical junction, is thin as possible to maximize CdTe photocurrent. High efficiency cells with vanishingly thin CdS, < 10 nm, have been fabricated by numerous groups, indicating that its primary role is junction formation by inversion of the near-surface region in CdTe and that its hole transport properties are inconsequential. As a parasitic optical layer, the CdS controls light generated current density, JL, for photons with wavelength less than 2.4 eV and therefore has a small influence on VOC, since:
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Figure 3. Cd-Te binary equilibrium phase diagram, T-x projections over entire range (left) and near Cd/Te = 1 (right).
At elevated temperatures, such as those used for cell processing, CdTe sublimes: CdTe ĺ Cd + ½Te2
(6)
With equilibrium constant given by: 1
K CdTe = pCd pTe22
(7)
The solid state stoichiometry is fixed by the disproportionate Cd and Te parti
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