Characterization of Cu-Al alloy/SiO 2 interface microstructure
- PDF / 18,097,244 Bytes
- 6 Pages / 612 x 792 pts (letter) Page_size
- 12 Downloads / 190 Views
Characterization of Cu-Al alloy/SiO2 interface microstructure Pei-I Wang1, S. P. Murarka1, G.-R. Yang1, E. Barnat1, T.-M. Lu1, Y.-C. Chen2, Xiang Li2 , and K. Rajan2 1 Center for Integrated Electronics, Electronics Manufacturing and Electronic Media, Rensselaer Polytechnic Institute, Troy, NY 12180 2 Department of Materials Science & Engineering, Rensselaer Polytechnic Institute, Troy NY 12180 ABSTRACT Cu-Al alloys have been recommended for application as the diffusion barriers/adhesion promoters for advanced copper based metallization schemes. This approach to barrier formation is to generate an ultra-thin interfacial layer through Cu alloying without significantly affecting the resistivity of Cu. In this paper the microstructure of the bilayers of Cu/Cu-5 at%Al and Cu-5 at%Al/Cu sputter deposited on SiO2 before and after thermal annealing is investigated by transmission electron microscopy (TEM). Interfacial layer is observed in both cases. The variation of the resistance of the Cu-Al alloy film is consistent with its microstructure. The x-ray diffraction (XRD) spectra of Cu-5 at%Al on SiO2 shows that the addition of Al into Cu intends to favor the Cu (111) texture. These results will be presented and discussed showing that films of Cu doped with Al appear to act as a suitable barrier and adhesion promoter between SiO2 and Cu. INTRODUCTION Copper interconnect-technology has been moving rapidly from research onto actual productmanufacturing in industry. Copper offers lower resistivity, higher reliability against electromigration, and improved mechanical properties compared to aluminum.1 It can be easily deposited by chemical vapor deposition (CVD), physical vapor deposition (PVD), electroless deposition, and electroplating. Both CVD and plating techniques have been paid high attention because they provide good step coverage. Plating techniques are especially appealing because of low cost and low processing temperature as well as good via/trench filling capability. Copper, however, migrates into SiO2 when subjected to high temperature or high bias.2 Diffusion in SiO2 may deteriorate the insulator characteristics and through SiO2 into silicon may cause device leakage currents. Also copper does not adhere to SiO2 surfaces because of the inability of Cu in reducing SiO2 and thus forming strong chemical bonding at the interface.1 It is thus necessary to employ diffusion barrier layers that prevent copper penetration into the underlying devices and at the same time promote adhesion between SiO2 and Cu. Several different barrier materials have been researched.4 - 8 Most of these have high resistivities (100 – 1000 µΩ-cm range) and have been known to be effective in thickness larger than 10 nm. Future application, in narrower trenches and vias, require barrier with resistivities comparable to copper and very thin (1-3 nm). Another approach has been considered to barrier formation. The approach uses small amounts of alloying additions to copper leading to self-forming barriers, at the Cu-SiO2 interface, without significantly
Data Loading...