Charge Pump Circuit Theory
This chapter discusses circuit theory of the charge pump circuit. Since it was invented in 1932, various types have been proposed. After several typical types of charge pumps are reviewed, they are compared in terms of the circuit area and the power effic
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Charge Pump Circuit Theory
Abstract This chapter discusses circuit theory of the charge pump circuit. Since it was invented in 1932, various types have been proposed. After several typical types of charge pumps are reviewed, they are compared in terms of the circuit area and the power efficiency. The type that Dickson proposed is found to be the best one as an on-chip generator where the parasitic capacitance is 1–10% of the pump capacitor. Design equations and equivalent circuit models are derived for the charge pump. Using the model, optimizations are discussed to minimize the circuit area under various conditions that the output current, the ramp time, and the power dissipation are given theoretically.
This chapter is composed of the followings. Section 2.1 reviews several pump topologies and qualitative comparison among them. Section 2.2 presents operation analysis of each pump cell, i.e., Greinacher and Cockcroft–Walton cell, Brugler serial–parallel cell, Falkner-Dickson cell, Ueno–Fibonacci cell, and Cernea-2N cell, and then compares them quantitatively. The results suggest that Dickson cell is the best topology because of the largest voltage gain and smallest circuit area. Section 2.3 discusses Dickson pump in more detail including the equivalent circuit as well as several optimizations of the circuit with respect to circuit area and power.
2.1
Pump Topologies and Qualitative Comparison
This section begins with a brief history of several topologies of charge pump and their background on the critical characteristic parameters, i.e., the output impedance and the maximum attainable voltage. Operation of the initial topology as known as Cockcroft–Walton multiplier is discussed and the characteristic parameters are shown. Optimum design for maximizing the output power is, respectively, given under the conditions of resistive load and current load. After that, several topologies of pump are described which aim at having lower output T. Tanzawa, On-chip High-Voltage Generator Design, Analog Circuits and Signal Processing, DOI 10.1007/978-1-4614-3849-6_2, # Springer Science+Business Media New York 2013
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2 Charge Pump Circuit Theory
Fig. 2.1 History of two phase clock charge pump voltage multipliers
impedance for higher output current at a given output voltage. Qualitative sensitivity analysis on the parasitic capacitance of pump capacitors suggests that larger number of serially connected capacitors results in larger impact of the parasitic capacitance on the output current. The switched-capacitor (SC) multiplier originated with Greinacher and Cockcroft–Walton (CW) using serial capacitor ladders independently. Because the CW multiplier had a relatively large output impedance with an order of N3, where N is the number of stages, various types of multipliers with different topologies have been proposed to reduce the output impedance. By alternately switching the state from in-serial to in-parallel and vice versa, Brugler theoretically showed that the serial–parallel (SP) multiplier had lower output imp
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