Concurrency and Hardware Design Advances in Petri Nets
As CMOS semiconductor technology strides towards billions of transistors on a single die new problems arise on the way. They are concerned with the - minishing fabrication process features, which a?ect for example the gate-to-wire delay ratio. They manife
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Jordi Cortadella Alex Yakovlev Grzegorz Rozenberg (Eds.)
Concurrency and Hardware Design Advances in Petri Nets
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Series Editors Gerhard Goos, Karlsruhe University, Germany Juris Hartmanis, Cornell University, NY, USA Jan van Leeuwen, Utrecht University, The Netherlands Volume Editors Jordi Cortadella Technical University of Catalonia, Department of Software Campus Nord, M`odul C5, Jordi Girona Salgado 1-3, 08034 Barcelona, Spain E-mail: [email protected] Alex Yakovlev University of Newcastle, School of Electrical, Electronic and Computer Engineering Newcastle upon Tyne, NE1 7RU, UK E-mail: [email protected] Grzegorz Rozenberg Leiden University, Center for Natural Computing Niels Bohrweg 1, 2333 CA Leiden, The Netherlands E-mail: [email protected]
Cataloging-in-Publication Data applied for A catalog record for this book is available from the Library of Congress. Bibliographic information published by Die Deutsche Bibliothek Die Deutsche Bibliothek lists this publication in the Deutsche Nationalbibliografie; detailed bibliographic data is available in the Internet at .
CR Subject Classification (1998): B, C, D.2.4, F.1, F.4 ISSN 0938-5894 ISBN 3-540-00199-9 Springer-Verlag Berlin Heidelberg New York This work is subject to copyright. All rights are reserved, whether the whole or part of the material is concerned, specifically the rights of translation, reprinting, re-use of illustrations, recitation, broadcasting, reproduction on microfilms or in any other way, and storage in data banks. Duplication of this publication or parts thereof is permitted only under the provisions of the German Copyright Law of September 9, 1965, in its current version, and permission for use must always be obtained from Springer-Verlag. Violations are liable for prosecution under the German Copyright Law. Springer-Verlag Berlin Heidelberg New York a member of BertelsmannSpringer Science+Business Media GmbH http://www.springer.de © Springer-Verlag Berlin Heidelberg 2002 Printed in Germany Typesetting: Camera-ready by author, data conversion by DA-TeX Gerd Blumenstein Printed on acid-free paper SPIN: 10871699 06/3142 543210
Preface
As CMOS semiconductor technology strides towards billions of transistors on a single die new problems arise on the way. They are concerned with the diminishing fabrication process features, which affect for example the gate-to-wire delay ratio. They manifest themselves in greater variations of size and operating parameters of devices, which put the overall reliability of systems at risk. And, most of all, they have tremendous impact on design productivity, where the costs of utilizing the growing silicon ‘real estate’ rocket to billions of dollars that have to be spent on design, verification, and testing. All such problems call for new design approaches and models for digital systems. Furthermore, new developments in non-CMOS technologies, such as single-electron transistors, rapid single-fluxquantum devices, quantum
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