CyNAPSE: A Low-power Reconfigurable Neural Inference Accelerator for Spiking Neural Networks
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CyNAPSE: A Low-power Reconfigurable Neural Inference Accelerator for Spiking Neural Networks Saunak Saha1
· Henry Duwe1 · Joseph Zambreno1
Received: 30 November 2019 / Revised: 17 March 2020 / Accepted: 5 May 2020 © Springer Science+Business Media, LLC, part of Springer Nature 2020
Abstract While neural network models keep scaling in depth and computational requirements, biologically accurate models are becoming more interesting for low-cost inference. Coupled with the need to bring more computation to the edge in resourceconstrained embedded and IoT devices, specialized ultra-low power accelerators for spiking neural networks are being developed. Having a large variance in the models employed in these networks, these accelerators need to be flexible, userconfigurable, performant and energy efficient. In this paper, we describe CyNAPSE, a fully digital accelerator designed to emulate neural dynamics of diverse spiking networks. Since the use case of our implementation is primarily concerned with energy efficiency, we take a closer look at the factors that could improve its energy consumption. We observe that while majority of its dynamic power consumption can be credited to memory traffic, its on-chip components suffer greatly from static leakage. Given that the event-driven spike processing algorithm is naturally memory-intensive and has a large number of idle processing elements, it makes sense to tackle each of these problems towards a more efficient hardware implementation. With a diverse set of network benchmarks, we incorporate a detailed study of memory patterns that ultimately informs our choice of an application-specific network-adaptive memory management strategy to reduce dynamic power consumption of the chip. Subsequently, we also propose and evaluate a leakage mitigation strategy for runtime control of idle power. Using both the RTL implementation and a software simulation of CyNAPSE, we measure the relative benefits of these undertakings. Results show that our adaptive memory management policy results in up to 22% more reduction in dynamic power consumption compared to conventional policies. The runtime leakage mitigation techniques show that up to 99.92% and at least 14% savings in leakage energy consumption is achievable in CyNAPSE hardware modules. Keywords Neuromorphic · Spiking neural networks · Reconfigurable · Accelerator · Memory · Caching · Leakage · Energy efficiency
1 Introduction While deep neural networks provide state-of-the-art performance in classification, regression and even generative
Saunak Saha
[email protected] Henry Duwe [email protected] Joseph Zambreno [email protected] 1
Department of Electrical and Computer Engineering, Iowa State University, Ames, IA, USA
tasks, they have to pay steep dividends when deployed on conventional architectures [8]. Recently, there has been an unprecedented increase in the depth of neural networks owing to their application in extremely complicated tasks of perception and generation [45]. As these networks grow wider and deeper, the numb
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