Deep Levels in Multilayer Structures of Si/Si 0.8 Ge 0.2 Grown by Low-Pressure Chemical Vapor Deposition
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Deep Levels in Multilayer Structures of Si/Si0.8Ge0.2 Grown by Low-Pressure Chemical Vapor Deposition Yutaka Tokuda and Kenichi Shirai Department of Electronics, Aichi Institute of Technology, Toyota 470-0392, Japan
ABSTRACT Deep levels in multilayer structures of ten periods Si/Si0.8Ge0.2 (16/5 nm) grown by low-pressure chemical vapor deposition have been characterized by deep level transient spectroscopy (DLTS). DLTS measurements reveal one dominant peak (E1) at around 130 K with a minor peak (E2) at around 240 K. The dominant trap E1 (Ec – 0.19 eV) is ascribed to the dislocation-related defect. The increase of the E1 concentration by a factor of 2 to 3 and the change of its energy level to Ec – 0.22 eV are observed with annealing up to 120°C. It is speculated that hydrogen incorporated during growth associates with E1 and the behavior of E1 upon annealing is caused by the release of hydrogen from E1.
INTRODUCTION Much attention has been paid to the growth of Si/SiGe structures on a Si substrate owing to their potential ability for high-speed and optoelectronic devices such as heterojunction bipolar transistors [1], strained-layer field effect transistors [2] and infrared photodetectors [3]. Also, the Si/SiGe strained-layer superlattice has been used as an absorption region near 1.3 µm for photodetectors [4]. In order to achieve the good-quality devices, it is important to control defects introduced during epitaxial growth and device processing since they act as trapping and recombination centers. Dislocation-related defects are expected to be introduced in the epitaxial layers of Si/SiGe multilayer structures [5,6]. In this work, we study deep levels in multilayer structures of ten periods Si/Si0.8Ge0.2 (16/5 nm) grown by low-pressure chemical vapour deposition (LPCVD). Deep level transient spectroscopy (DLTS) [7] has been employed to characterize deep levels in the multilayer structures.
EXPERIMENT The samples were grown by LPCVD using SiH4 and GeH4 as source gases and H2 as a carrier gas. A 3 µm thick Si buffer layer was grown at 850°C on n-type (100) Si with the resistivity of 0.05-0.5 Ωcm and then ten periods of Si/Si0.8Ge0.2 (16/5 nm) were grown at 595°C followed by a 0.25 µm thick Si cap layer. These layers were doped with phosphorus by using PH3 as a doping gas. Finally, a 0.02 µm thick undoped Si layer was grown. Schottky contacts were fabricated on the Si cap layer by thermal evaporation of gold. Ohmic contacts were formed by rubbing eutectic In-Ga on the backside of the n+ Si substrate. DLTS measurements with a bipolar weighting function [8] were performed using a Boonton 72B
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capacitance meter. The measurement temperature was in the range from 80 K to room temperature. In this paper, DLTS spectra recorded with the rate window of 54 s-1 are presented. Thermal stability of deep levels found in the layers was investigated by using isochronal annealing. Isochronal annealing for 10 min was carried out for fabricated diodes in the temperature range up to 120°C.
RESULTS AND DISCUSSION
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