Digital implementation methods for grid synchronization using an integrated filter
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ORIGINAL ARTICLE
Digital implementation methods for grid synchronization using an integrated filter Yongsoon Park1 · Dong‑Hyun Moon1 · Geon Heo1 Received: 21 January 2020 / Revised: 10 June 2020 / Accepted: 12 June 2020 © The Korean Institute of Power Electronics 2020
Abstract The steady rise in the deployment of grid-connected inverters is driving a need for more efficient and accurate grid synchronization techniques. In this paper, digital implementation methods are proposed to increase grid synchronization accuracy when an integrated filter is used. First, a method to compensate for the computational delays in the implementation of integrated filters with numerical integrations is presented. Second, a simple method to estimate the grid frequency is introduced for updating the center frequency of integrated filters. The proposed methods have been implemented in a digital signal processor and tested with a real-time simulator. They achieve ripple errors of 0.14 mHz and 0.008° in the frequency and phase angle estimations, respectively. Keywords Discrete time · Frequency estimation · Grid synchronization · Numerical integration · Signal processing
1 Introduction With recent trends increasing the share of distributed energy resources (DERs) in power systems, grid synchronization is becoming more important. This is due to the fact that more complex operations are required to host the increased number of DERs in a grid [1–4]. To address DERs’ active reactions to the grid, it is useful to detect the frequency and/ or phase angle of the grid voltage through synchronization. This detection can be used for advanced operations such as active/reactive power modulation and demand response [5, 6]. There are many methods for grid synchronization. Unbalances and harmonics in a grid may be effectively mitigated by introducing certain techniques [7–9]. For simple implementation, it is possible to use an integrated filter that replaces plural filters with a single structure. In particular, an integrated filter called second-order generalized integrator (SOGI) can be used to extract the direct–quadrature (d–q) voltage from single-phase voltage with simultaneous filtering of harmonics [8]. However, since DC bias cannot be eliminated in quadrature voltage, several methods have * Yongsoon Park [email protected] 1
School of Integrated Technology, Gwangju Institute of Science and Technology (GIST), Gwangju, Korea
been proposed to enhance DC rejection by adding extra elements to SOGI [10–12]. Although these methods can filter out DC bias, the extra additions to SOGI increase the design complexity. Another integrated filter called frequency-adaptive circletracing observer (FACTO) has been proposed on the basis of a state estimator [13]. In this method, DC rejection is inherent in the process of d–q filtering. Because FACTO is based on linear equations, its filtering properties can be easily understood when its control gains are adjusted. However, the implementation of FACTO in a discrete-time domain must be approached carefull
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