Domain Specific High-Level Synthesis for Cryptographic Workloads
This book offers an in-depth study of the design and challenges addressed by a high-level synthesis tool targeting a specific class of cryptographic kernels, i.e. symmetric key cryptography. With the aid of detailed case studies, it also discusses optimiz
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Ayesha Khalid Goutam Paul Anupam Chattopadhyay
Domain Specific High-Level Synthesis for Cryptographic Workloads
Computer Architecture and Design Methodologies Series Editors Anupam Chattopadhyay, Nanyang Technological University, Singapore, Singapore Soumitra Kumar Nandy, Indian Institute of Science, Bangalore, India Jürgen Teich, Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Erlangen, Bayern, Germany Debdeep Mukhopadhyay, Indian Institute of Technology Kharagpur, Kharagpur, West Bengal, India
Twilight zone of Moore’s law is affecting computer architecture design like never before. The strongest impact on computer architecture is perhaps the move from unicore to multicore architectures, represented by commodity architectures like general purpose graphics processing units (gpgpus). Besides that, deep impact of application-specific constraints from emerging embedded applications is presenting designers with new, energy-efficient architectures like heterogeneous multi-core, accelerator-rich System-on-Chip (SoC). These effects together with the security, reliability, thermal and manufacturability challenges of nanoscale technologies are forcing computing platforms to move towards innovative solutions. Finally, the emergence of technologies beyond conventional charge-based computing has led to a series of radical new architectures and design methodologies. The aim of this book series is to capture these diverse, emerging architectural innovations as well as the corresponding design methodologies. The scope covers the following. • Heterogeneous multi-core SoC and their design methodology • Domain-specific architectures and their design methodology • Novel technology constraints, such as security, fault-tolerance and their impact on architecture design • Novel technologies, such as resistive memory, and their impact on architecture design • Extremely parallel architectures
More information about this series at http://www.springer.com/series/15213
Ayesha Khalid Goutam Paul Anupam Chattopadhyay •
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Domain Specific High-Level Synthesis for Cryptographic Workloads
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Ayesha Khalid The Institute of Electronics, Communications and Information Technology Queen’s University Belfast Belfast, Ireland
Goutam Paul Cryptology and Security Research Unit R. C. Bose Centre for Cryptology and Security Indian Statistical Institute Kolkata, India
Anupam Chattopadhyay School of Computer Engineering Nanyang Technological University Singapore, Singapore
ISSN 2367-3478 ISSN 2367-3486 (electronic) Computer Architecture and Design Methodologies ISBN 978-981-10-1069-9 ISBN 978-981-10-1070-5 (eBook) https://doi.org/10.1007/978-981-10-1070-5 Library of Congress Control Number: 2019933716 © Springer Nature Singapore Pte Ltd. 2019 This work is subject to copyright. All rights are reserved by the Publisher, whether the whole or part of the material is concerned, specifically the rights of translation, reprinting, reuse of illustrations, recitation, broadcasting, reproduction on microfilms or in any other physical way, and transmis
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