Dry Surface Cleaning of Plasma-Etched Hemts
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DRY SURFACE CLEANING OF PLASMA-ETCHED HEMTs S. J. PEARTON( 1 ), F. REN('), A. KATZ("), U. K. CHAKRABARTI(1 ), E. LANE(2 ), W. S. HOBSON('), R. F. KOPF(') C. R. ABERNATHY"t ), C. S. WUW3 ), D. A. BOHLING(4) and J. C. IVANKOVITS(4) 1 ( "AT&T Bell Laboratories, Murray Hill, NJ (2)AT&T Bell Laboratories, Breinigsville, PA (3)Hughes Aircraft Co., Torrance, CA (4)Air Products and Chemicals Inc., Allentown, PA ABSTRACT Fabrication of sub-micron high electron mobility transistors (HEMTs) involves dry etch removal of GaAs from an underlying AIGaAs or InGaAs stop layer. The etch selectivity is achieved by formation of AIF 3 on AlGaAs, or lnCl3 and lnF 3 on InGaAs, which must be removed before processing can proceed. Wet chemical cleaning has difficulty in such a situation because of surface tension effects. We have investigated use of Electron Cyclotron Resonance (ECR) H2 or Ar discharges, or hexafluoroacetylacetone (HFAC) vapor, for in-situ dry etch cleaning of HEMTs exposed to low bias BCl 3 /SF 6 discharges. The HFAC vapor can remove most of the remnant fluorine, but is effective only when the sample is heated above -250'C. This relatively high temperature is not compatible with in-situ cleaning of the etched device. Low-bias (-75V) sputter cleaning with an Ar discharge removes all remnant Cl and -40% of the F, but dc biases above -125V are required for complete cleaning, and this ion bombardment can lead to damage in the HEMT. ECR H2 discharge exposure is effective in removing all Cl- and F-related residues in a short period (-5 mins) with low dc biases (-25V) on the sample. INTRODUCTION There are four major areas in realizing a manufactuable high yield pseudomorphic high electron mobility transistor (HEMT) fabrication technology. These are: (i) high selectivity in etching GaAs over AlGaAs or InGaAs. The gate recess fabrication for a HEMT involves selective removal of the GaAs contact layer from the underlying doped AlGaAs donor layer or a thin InGaAs etch stop layer [ 1-9]. This can be achieved with very high selectivity (>100:1) using CCI2 F~l°) or BCI 3 (SiCI 4 )/SF6 [11] discharges with moderately low dc biases on the sample. There are two advantages to the use of BCI 3 /SF 6 or SiC14 /SF 6 mixtures-first, the F-to-Cl ratio can be made arbitrarily large and secondly, there is uncertainty about the long-term availability of CC12 /F 2 because of deleterious effect on the Earth's ozone layer [12]. Since the etch-stop mechanism is formation of relatively involatile AIF 3 (or InCl 3 and lnF 3 for lnGaAs) species on the surface, one should aim to have both a high F concentration in the discharge and also a low self-bias on the sample so that these species will not be removed by sputtering, lowering the selectivity. (ii) damage-free etching. The plasma exposure step should obviously not degrade the performance of the HEMT. This is true for the gate recess formation or for the patterning of trilevel resist masking layers used for achieving sub-micron gate widths. In both cases, use of dc self-biases of 1000A • min- 1 at low
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