Electrical and Electronic Properties of Grain Boundaries in Silicon

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ELECTRICAL AND ELECTRONIC PROPERTIES OF GRAIN BOUNDARIES IN SILICON HANS J. QUEISSER AND JORGEN H. WERNER Max-Planck-Institut ffir Festkbrperforschung, D-7000 Stuttgart 80, Federal Republic of Germany ABSTRACT The electronic states at silicon grain boundaries trap preferentially majority carriers, thus cause a potential barrier impeding current flow. We here summarize measurement techniques for the energy distribution of these grain boundary traps. The analysis reveals band tails due to disorder in the boundary plane as well as interface state continua at midgap. The spatial distribution of trapped charges results in significant electrostatic potential fluctuations which are observable in ac-admittance and noise experiments; the charge fluctuations cause in particular 1/f-like noise. The naive model of dangling bonds to describe grain boundary charges is insufficient, impurity atoms, especially oxygen, play essential roles in determining electronic behavior. INTRODUCTION Grain boundaries in the elemental semiconductors germanium and silicon were objects of intense research in the early 1960s for two reasons: On the one hand, the functioning and the reliability of devices were endangered by dislocations, especially when these linear defects arranged themselves into two-dimensional boundaries [1-3J; dislocations were therefore unwanted and to be eliminated from material for devices. On the other hand, there was hope to find current conduction along dislocations and to utilize these distinct lattice singularities for special device configurations of atomistic dimensions [4,51. The first goal was achieved: Dislocations can meanwhile be avoided in crystal growth and processing, and, moreover, their deleterious electronic defects are much less harmful than previously anticipated [5,6,71. The second objective, the use of dislocations in devices has, however, not been met. A two-dimensional electron gas is, for example, more easily and reproducibly achieved at hetero-interfaces produced by epitaxial techniques than at silicon grain boundaries [8]. A scientific objective was also missed, studies of dangling bonds, supposedly available in concentrated form within boundaries, did not reveal clear attributions of electronic phenomena to the unsaturated bonds (5]. Renewed interest in silicon grain boundaries has been generated in the 1980s by massive usage of fine-grained Si for gates and leads in integrated circuits. Another driving force for grain boundary research has been the use of coarse-grained polySi for solar cells. Most of these applications of polySi are much more tolerant than usually encountered in circuit manufacturing with single crystals. Nevertheless, the polycrystalline material suffers from a typical resistivity enhancement as well as from an increased minority carrier recombination due to the inherent grain boundaries. Potential barriers at the boundaries, as shown in Fig.l, are the origin of these deficiencies which require research and development. This paper first reviews characterization techniques for t

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