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ABSTRACT In this paper, we present the microstructural evolution of silicide phase with TiNx/Si structure. The nitrogen atoms in the TiNx film limites the available Ti atoms that react with Si substrate to form silicide. Hence, the thickness of Ti-Si amorphous interlayer (W-interlayer) was much thinner in comparison with that from pure Ti film after annealing (RTA) at 5001C. Upon RTA at above 6001C, at first thin epitaxial C49-TiSi 2 was formed with an extremely uniform thickness on Si(100) substrate. Also the stable character of the epitaxial C49-TiSi 2 supress the structure transformation of TiSi 2 from C49 to C54.

INTRODUCTION The scale-down of very-large-scale integrated circuits (VLSI's) brings two major technological difficulties in the metal/silicon contact: One is an inevitably increased contact resistance due to the reduced contact hole area. The other is a decrease in reliability due to contact failure at shallow junction caused by the solid state reaction between metal and silicon. Therefore, it is necessary to develop new contact materials and contact structure with a lower contact resistivity and higher chemical and thermal stability.

In general, the interface of polycrystalline siicide (p-silicide)/silicon is increased with RTA temperature, which yields spiking due to rough p-silicide/silicon interface leading to increase of the leakage current. To solve this problem, Zaima et a1.[1] and Liauh et a/.[2,3] reported recently that the a-interlayer, which occurs in all refractory metal thin film on silicon substrate after RTA at the temperatures less than 6001C,[4] is made and resulting electrical properties of metal/silicon contact is far better than in p-silicide contact. It is caused by the following fact that the thickness of consumed silicon is less in samples of a-interlayer formed, so that the a-interlayer/silicon interface exists away from the junction as well as the end-of-range defects. However, Yoshida et a/.[5] announced that such an ct-interlayer causes a reliability problem, i.e., time dependent junction degradation. The ionized metal ions are extracted from the metastable ct-interlayer and its movement are enhanced to the interface of metallurgical junction by applied electric field. Therefore, the expected benifits of cl-interlayer become diminished in the junction contact for future VLSI. The modification of the contact process which should yield both minimal silicon consumption and uniform 465 Mat. Res. Soc. Symp. Proc. Vol. 355 01995 Materials Research Society

thickness of stable silicide is urgently needed so as to preserve an ohmic contact without any degradation of the preformed shallow junction. Because sharp and homogeneous metal-silicon interfaces are avaliable in an epitaxially formed silicide on silicon substrate[6,7] and its thermal stabilities are also superior,[81 the formation of homogeneous epitaxial interlayer/silicon interface would represent the best candidate for the contact metallization of future VLSI. In this paper, we described a new technique, reactive sputteri