Erbium-Silicided Source/Drain Junction Formation by Rapid Thermal Annealing Technique for Decananometer-Scale Schottky B
- PDF / 192,043 Bytes
- 6 Pages / 612 x 792 pts (letter) Page_size
- 88 Downloads / 230 Views
C2.5.1
Erbium-Silicided Source/Drain Junction Formation by Rapid Thermal Annealing Technique for Decananometer-Scale Schottky Barrier Metal-Oxide-Semiconductor FieldEffect Transistors Moongyu Jang, Yarkyeon Kim, Jaeheon Shin, Kyoungwan Park1 and Seongjae Lee Future Technology Research Division, Electronics and Telecommunication Research Institute, Daejon, 305-350, Korea 1 Department of Nano Science and Technology, University of Seoul, Seoul, 130-743, Korea ABSTRACT The stable growth conditions of erbium-silicide on silicon-on-insulator (SOI) are investigated considering annealing temperature, SOI and sputtered erbium thickness. From the sheet resistance measurement, X-ray diffraction and Auger electron spectroscopy analysis, the optimum annealing temperature is determined as 500 °C. Also, for the stable growth of erbiumsilicide on SOI, the sputtered erbium thickness should be less than 1.5 times of SOI thickness. As the SOI thickness decreases below this critical thickness, erbium-rich region is formed at the erbium-silicide and buried-oxide interface. By applying the optimized erbium-silicide growth conditions, 50-nm-gate-length n-type SB-MOSFET is manufactured, which shows the possible usage of erbium-silicide as the source and drain material in the n-type Schottky barrier MOSFETs for decananometer regime applications.
INTRODUCTION As the gate length of metal-oxide-semiconductor field-effect transistors (MOSFETs) is reduced down to decananometer-scale, ultra-shallow junction formation techniques become great importance for the suppression of short channel effects [1-2]. However, one major drawback in the usage of ultra-shallow junction is the high parasitic series resistance. This obstacle can be overcome with Schottky barrier metal-oxide-semiconductor field-effect transistors (SBMOSFETs) by replacing the impurity doped source and drain regions with silicides [1, 3-5]. Especially, erbium-silicide and platinum-silicide are the most promising materials for the n-type and p-type SB-MOSFETs because of their low Schottky barrier heights for electron and hole, respectively [5]. The structure is quite simple and the ultra-shallow junction can be formed easily and accurately with very low parasitic source and drain resistance, since the silicided junction depth is controlled by the deposited metal thickness and annealing temperature. The silicided junction formation temperature is very low in SB-MOSFETs, compared with the impurity doped junction activation temperature in conventional MOSFETs, giving the opportunity to use metal as gate electrode and high dielectric materials as gate insulator. Moreover, the complicated channel doping steps can be eliminated because Schottky barrier exists between junction and channel. Thus, SB-MOSFETs have been proposed as an alternative to the conventional MOSFETs for sub-100 nm applications [1, 3-5]. Although the works regarded to the erbium-silicides have been extensively carried out, most of them have been concentrated on the formation mechanisms and the crystalline structures witho
Data Loading...
