Explanation of Light/Dark Superposition Failure in CIGS Solar Cells
- PDF / 210,392 Bytes
- 6 Pages / 612 x 792 pts (letter) Page_size
- 80 Downloads / 232 Views
B5.20.1
Explanation of Light/Dark Superposition Failure in CIGS Solar Cells Markus Gloeckler, Caroline R. Jenkins, and James R. Sites Physics Department, Colorado State University, Fort Collins, CO 80523, USA ABSTRACT CIGS solar cells in many cases show a failure of light/dark superposition of their currentvoltage (J-V) curves. Such failure generally becomes more pronounced at lower temperatures. J-V measurements under red light may also show an additional distortion, known historically as the “red kink”. The proposed explanation is that a secondary barrier results from the conduction band offset between CIGS and the commonly employed CdS window layer. This barrier produces a second diode with the same polarity and in series with the primary photodiode. The secondary-diode barrier height is modified by photoinduced changes of trap occupancy in the CdS layer, hence creating a voltage shift between dark and light conditions. Numerical modeling of the proposed explanation, including a band offset consistent with experimental and theoretical values, gives a very good fit to measured light and dark J-V curves over a wide temperature range. It also predicts the observed difference between illuminated J-V curves with photon energy above the CdS band gap, and those with sub-band-gap illumination. INTRODUCTION A commonly observed feature in CuIn1-xGaxSe2 (CIGS) solar cells is the lack of superposition between light and dark current-voltage data. While the basic theory of solar cells predicts the current density shift JL should be a constant for all voltages, CIGS solar cells often show deviations from this ideal behavior. Using numerical simulation, it will be shown that this effect can be explained assuming conduction band offsets at the ZnO-CdS and CdS-CIGS interfaces. Good agreement with experimental data has been produced. In practice, band offsets depend strongly on the deposition technique and are neither reproducible nor predictable if the structure or process is changed. A good overview on the status on band offsets in CdS/CIS structures can be found in a publication from Wei and Zunger [1]. In their work, the conduction band offset for the CdS/CIS interface is found to be about +0.3 eV (positive sign means conduction band is higher on larger band-gap side) based on theoretical calculations, which contradicts the negative offset of -0.28 eV, based on the electron affinities of CdS and CIS. Experimental investigations of the CdS/CIS interface by Schmid et al. [2] confirmed the positive offset of approximately +0.3 eV. The CIGS typically used, 20% indium replaced by gallium, should not alter these numbers significantly. The effects of band offsets on short circuit current density, open circuit voltage and efficiency have been studied with numerical simulations [3,4]. Both studies came to the conclusion that band offsets up to 0.4 eV allow good device performance, whereas for higher offsets fill factors are severely reduced. EXPERIMENTAL The characterization performed at Colorado State University on samples supplied by
Data Loading...
