Flash memory based computing-in-memory system to solve partial differential equations
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June 2021, Vol. 64 169401:1–169401:2 https://doi.org/10.1007/s11432-020-2942-2
Flash memory based computing-in-memory system to solve partial differential equations Yang FENG, Fei WANG, Xuepeng ZHAN, Yuan LI & Jiezhi CHEN* School of Information Science and Engineering, Shandong University, Qingdao 266237, China Received 13 March 2020/Revised 9 May 2020/Accepted 4 June 2020/Published online 23 September 2020
Citation Feng Y, Wang F, Zhan X P, et al. Flash memory based computing-in-memory system to solve partial differential equations. Sci China Inf Sci, 2021, 64(6): 169401, https://doi.org/10.1007/s11432-020-2942-2
Dear editor, Many emerging non-volatile memories (NVM), such as resistive random access memory (RRAM) [1], phase-change memory (PCM) [2], and ferroelectric RAM (FeRAM) [3], together with the conventional flash memory [4, 5], have demonstrated their good capabilities in many artificial neural networks. Similar to artificial neural network processing, a hardware matrix for vector-matrix multiply-and-accumulate (MAC) operation is necessary for partial differential equation (PDE) calculations. Recently, one-step solvers without iterations were developed by Sun et al. [6] for linear systems. However, PDEs in most cases are solved iteratively. The study from Zidan et al. [7] proposed an algorithm of memristor-based CIM system as PDE solvers. Owing to the low precision of memristor devices, the matrix array unit is small (3×3 matrix) and the precision extension technique has to be integrated. To solve this issue, flash memory represents a great choice because it is a non-volatile memory technology with ultra-high density, low cost, robust reliabilities, and better control of cell variations [8]. In this study, we design a flash-memory-based CIM hardware system to perform hard tasks requiring high precision and accurate solutions. On the basis of Jacobi iteration algorithm, we construct the iteration matrix to solve elliptic PDEs. The saturation region of memory cells is used for vector-matrix MAC operations to suppress device-to-device variations, and the computation convergence of different memory arrays is comparably studied in detail. The core processing unit is constructed with flash memory arrays of 65 nm NOR flash memory technology, as shown in Figure 1(a). To achieve an accurate solution for numerical computations, the saturation region of flash memory cell is used in this study. The characteristic of the saturation region is described as I = β · (Vg − Vth )2 , were Vth is an adjustable parameter by changing the program states of memory cells, which is considered as one of the multipliers. By accumulating the current through the array cells adjusted by Vth , the result of integrator is the dot product of the pulse time and the current of array cells with a
common source line, i.e., Q = I · T . Based on Kirchhoff’s current law, matrix addition can be achieved by measuring the integral of currents. The elements of the input vector and the coefficient matrix are represented by the pulse time a
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