FPGA Implementation of an MUD Based on Cascade Filters for a WCDMA System
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FPGA Implementation of an MUD Based on Cascade Filters for a WCDMA System Quoc-Thai Ho, Daniel Massicotte, and Adel-Omar Dahmane Laboratory of Signal and System Integration (LSSI), Department of Electrical and Computer Engineering, Universit´e du Qu´ebec a` Trois-Rivi`eres, 3351 Boulevard des Forges, C.P. 500, Trois-Rivi`eres, QC, Canada G9A 5H7 Received 2 October 2004; Revised 30 June 2005; Accepted 12 July 2005 The VLSI architecture targeted on FPGAs of a multiuser detector based on a cascade of adaptive filters for asynchronous WCDMA systems is presented. The algorithm is briefly described. This paper focuses mainly on real-time implementation. Also, it focuses on a design methodology exploiting the modern technology of programmable logic and overcoming the limitations of commercial tools. The dedicated architecture based on a regular structure of processors and a special structure of memory exploiting FPGA architecture maximizes the processing rate. The proposed architecture was validated using synthesized data in UMTS communication scenarios. The performance goal is to maximize the number of users of different WCDMA data traffics. This dedicated architecture can be used as an intellectual property (IP) core processing an MUD function in the system-onprogrammable-chip (SOPC) of UMTS systems. The targeted FPGA components are Virtex-II and Virtex-II Pro families of Xilinx. Copyright © 2006 Hindawi Publishing Corporation. All rights reserved.
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INTRODUCTION
The third generation (3G) of mobile wireless communication is adopted for high-throughput services and the effective utilization of spectral resources. This work focuses on Universal Mobile Universal Telecommunications systems (UMTS). In UMTS Systems, the wideband code-division multiple-access (WCDMA) scheme is adopted. The desired data throughputs for 3G UMTS systems are 144 kbps for vehicular, 384 kbps for pedestrian, and 2 Mbps for indoor environments [1, 2]. The receivers in 3G systems must take into account not only intersymbol interferences (ISI), but also more importantly multiple-access interferences (MAIs) which increase radically in the number of users and data rates. Multiuser detectors (MUDs) are applied to eliminate the MAI and become essential for an efficient 3G wireless network systems deployment [3]. The algorithmic aspect of MUD has become an important research issue over the last decade (e.g., [3–6]). Moreover, the real-time implementation aspect of MUDs is also well documented (e.g., [6–9]). The rapid prototyping targeted on field-programmable gate arrays (FPGAs) is also proposed [10–12]. These works demonstrate several limitations in practical systems in terms of timing and algorithm and hardware constraints (e.g., arithmetic complexity, memory access requirements, data flow) [5–7]. Moreover, no work was done to maximize the number
of users on a chip (or a device in case of FPGAs). Maximizing the number of users makes it possible to increase the capacity of a cell and multiantenna processing. Because minimum-mean-square-error (MMSE)-based rece
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