High Electron Mobility SiGe/Si Transistor Structures on Sapphire Substrates
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High Electron Mobility SiGe/Si Transistor Structures on Sapphire Substrates Samuel A. Alterovitz1, Carl H. Mueller2, Edward T. Croke3, and George E. Ponchak1 1
NASA Glenn Research Center, Cleveland, OH 44135 USA Analex Corporation, Cleveland, OH 44135 USA 3 HRL Laboratories LLC, Malibu, CA USA 90265 2
ABSTRACT SiGe/Si n-type modulation doped field effect structures and transistors (n-MODFETs) have been fabricated on r-plane sapphire substrates. The structures were deposited using molecular beam epitaxy, and antimony dopants were incorporated via a delta doping process. Secondary ion mass spectroscopy (SIMS) indicates that the peak antimony concentration was approximately 4x1019 cm-3. The electron mobility was over 1,200 and 13,000 cm2/V-sec at room temperature and 0.25 K, respectively. At these two temperatures, the electron carrier densities were 1.6 and 1.33x1012 cm-2, thus demonstrating that carrier confinement was excellent. Shubnikov-de Haas oscillations were observed at 0.25 K, thus confirming the two-dimensional nature of the carriers. Transistors, with gate lengths varying from 1 micron to 5 microns, were fabricated using these structures and dc characterization was performed at room temperature. The saturated drain current region extended over a wide source-to-drain voltage (VDS) range, with VDS knee voltages of approximately 0.5 V and increased leakage starting at voltages slightly higher than 4 V.
INTRODUCTION SiGe/Si n-MODFET structures on sapphire substrates are being studied for potential use in applications that require integration of high frequency RF and digital circuitry on a single wafer, such as transceivers for broadband beam-steerable phased-array antennas. This goal places stringent demands on the substrate material. For the analog circuitry, the substrate must support transistor structures with sufficiently high carrier mobilities to operate at these frequencies, as well as be sufficiently resistive so as to provide electrical isolation between devices [1]. Since most of the device functions are performed in the digital realm, the substrate must also support low-power digital device circuitry [2]. We believe that sapphire is promising for high frequency, high bandwidth system-on-a-chip applications. Complementary metal oxide semiconductor (CMOS) digital circuitry using Si-on-sapphire technology has been widely used for digital signal processing applications where radiation hardness and low power consumption are critical [3,4]. For high frequency system-on-a-chip designs, the performance of passive components such as inductors often limits system performance, and the ability to fabricate high quality inductors on sapphire has been demonstrated [5,6]. A key factor which has limited the upper frequency range for conventional silicon-on-sapphire (SOS) circuitry is the low carrier mobility. For SOS, carrier mobility decreases as the silicon thickness decreases and carrier concentration increases, thus all three parameters must be known so as to arrive at meaningful comparisons between t
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