High Temperature Oxide for NVM Interpoly Dielectric Applications
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Figure 1. Schematic of NVM Bitcell and enlarged cross-sectional view of ONO stack. A typical ONO stack contains thermally grown oxide layers and an LPCVD nitride layer as shown in figure 1. Issues affecting the performance and reliability of the memory cell include interfacial quality, scaling of the film stack, and dielectric properties of the films. A deposited oxide holds promise as a replacement for one or both of the thermal oxide layers in the ONO stack [1]. Thermally reoxidized polysilicon can be of poor quality at sharp comers [2], such as that shown encircled in figure 1, causing low dielectric breakdown fields and charge leakage paths. A deposited oxide with low thermal budget, uniform film quality and conformal coverage may 153 Mat. Res. Soc. Symp. Proc. Vol. 532 © 1998 Materials Research Society
improve the device electrical performance. Nitride is also difficult to oxidize to thicknesses greater than 3nm at the low temperatures required by thermal budget constraints. A potential reliability improvement is possible by increasing the top oxide thickness with a deposited film because hole leakage through the thin top oxide is a concern during data retention [3]. Besides providing possible improvements in materials quality, the process flow can be streamlined by depositing the oxide-nitride-oxide in a single LPCVD furnace. HTO was studied as an alternative to thermal oxide in an embedded flash ONO stack. The HTO was deposited in a production nitride furnace in successive runs without furnace cleans or test runs between depositions. After cumulative HTO depositions to over 3pm thickness, no issues involving particles or furnace degradation had developed. FLAT FILM CHARACTERIZATION The HTO films were deposited on 5" Si wafers in a 3-zone vertical furnace using dichlorosilane (DCS) and N20 reactant gases at 800-900 0 C. The basic reaction is: (1) SiH2C12 + 2N 20 --- > Si0 2 + 2HC1 + 2N 2 N Films were deposited at pressures ranging from 200mT to 500mT. Gas flows were varied from 10-70 sccm for DCS and 50-400 sccm for N 20. Deposition rate is controllable through gas flow and pressure. Table I shows the process variations that were examined. Experimental recipes at 800', 850° and 900°C were used in double poly capacitor structures, with additional variations in pressure and gas flows examined through process splits. Lower temperature is desirable for reducing thermal budgets of the full process flow, while 400mT pressure is advantageous because of improved cross-load uniformity as well as increased deposition rates at the lower temperatures. Table I. HTO process conditions and specific experimental recipes.
variations
"experiments"
Temp (°C)
Pressure (mT)
DCS:N20
Total Flow (sccm)
Dep Rate (nm/min)
800-900 800 850 900
200-500 400 400 400
1:3 - 1:20 1:5 1:5 1:5
75-450 240 240 240
0.28 0.95 2.90
Ref. Index (@633nm) 1.44-1.46 1.46 1.45
Flat films were analyzed through ellipsometry, atomic force microscopy and SIMS. An elli
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