Hydrogenated Amorphous Silicon Photodiode Technology for Advanced CMOS Active Pixel Sensor Imagers
- PDF / 571,263 Bytes
- 6 Pages / 612 x 792 pts (letter) Page_size
- 83 Downloads / 187 Views
Hydrogenated Amorphous Silicon Photodiode Technology for Advanced CMOS Active Pixel Sensor Imagers Jeremy A. Theil*, Min Cao, Gerrit Kooi, Gary W. Ray, Wayne Greene, Jane Lin, AJ Budrys, Uija Yoon, Shawming Ma, and Hans Stork Hewlett-Packard Laboratories, Palo-Alto, CA 94304 ABSTRACT Amorphous silicon photodiode technology is a very attractive option for image array integrated circuits because it enables large die-size reduction and higher light collection efficiency than c-Si arrays. We have developed a photodiode array technology that is fully compatible with a 0.35µm CMOS process to produce image sensors arrays with 10-bit dynamic range that are 30% smaller than comparable c-Si photodiode arrays. The VGA (640x480), array demonstrated here uses common intrinsic and p-type contact layers, and makes reliable contact to those layers by use of a monolithic transparent conductor strap tied to vias in the interconnect. The work presented here will discuss performance issues and solutions that lend themselves to cost-effective high-volume manufacturing. The various methods of interconnection of the diode to the array and their advantages will be presented. The photodiode dark leakage current density is about 80 pA/cm2, and its absolute quantum efficiency peaks about 85% at 550 nm. The effect of doped layer thickness and concentration on quantum efficiency, and the effect of a-Si:H defect concentration on diode performance will be discussed. INTRODUCTION Active pixel sensors are an attractive alternative to CCD image sensor because of lower power consumption, random pixel access, and a higher degree of system integration which often lead to reduced overall system costs [1]. Several advantages could be realized by elevating the photodiode above the substrate such as, resolution improvements, maximizing the light collection area, introduction of more efficient semiconducting layers, and minimizing absorption of light from intervening layers. While elevated photodiode arrays on CMOS and CCD technologies have been demonstrated, acceptance has been slow due to potentially expensive manufacturing techniques such as low a-Si:H deposition rates, and complex
*
a-Si:H Photodiode
Contact
Interconnect
Si Substrate
Figure 1: SEM cross section of elevated photodiode.
Corresponding Author e-mail: [email protected] A14.3.1
upper contact schemes; and process control-limited designs such as step coverage pixel isolation [2-7]. An elevated sensor technology utilizing hydrogenated amorphous silicon photodiodes has been developed that overcomes all of these concerns. The features of this technology allow for deposition rates of a-Si:H that are high enough to permit cost-effective manufacturing, contact with the top side of the diode is monolithic, and a process flow that allows for well controlled isolation of the pixel contact layer. In addition, the performance of the diode exceeds that of a cSi diode in some ways. For example, the absolute quantum efficiency of the photodiodes is about 85% in portions of the visible waveleng
Data Loading...
