Improving the performance of graphene nanoribbon field-effect transistors by using lanthanum aluminate as the gate diele
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Improving the performance of graphene nanoribbon field‑effect transistors by using lanthanum aluminate as the gate dielectric Tahereh Radsar1 · Hassan Khalesi1 · Vahid Ghods2 Received: 20 October 2019 / Accepted: 24 July 2020 © Springer Science+Business Media, LLC, part of Springer Nature 2020
Abstract In nanoscale transistors, electron tunneling increases and causes a large leakage current due to the reduced channel length and gate oxide thickness. To reduce the short-channel effects and leakage current, the gate oxide can be selected from materials with high dielectric constant. In this paper, lanthanum aluminate (LaAlO3), a material with a high dielectric coefficient, is used as a gate dielectric in the structure of graphene nanoribbon field-effect transistors (GNRFET) and the effect of using this material on the device performance is studied. The transistor characteristics are extracted from device simulations performed by self-consistently solving the Poisson and Schrodinger equations in the nonequilibrium Green’s function formalism, employing the tight-binding approximation in the mode-space and ballistic regime. The ON-state and OFF-state currents, the ION/IOFF ratio, the threshold voltage, the drain-induced barrier lowering (DIBL), the subthreshold swing, and the transconductance (gm) are calculated for L aAlO3 as well as different materials as the gate dielectric to investigate the device performance. Based on the simulation results, the use of LaAlO3 as the gate dielectric in the transistor structure instead of other materials leads to larger values of the ON-state current, ION/IOFF ratio, and gm as well as smaller values of the OFFstate current, threshold voltage, DIBL, and subthreshold swing. According to the obtained results and excellent properties of LaAlO3, the use of this material could improve the performance of GNRFETs. Keywords Graphene nanoribbon field-effect transistor · GNRFET · Gate dielectric · LaAlO3 · Simulation · Scaling
1 Introduction New technology tends to shrink more components onto a chip in integrated circuits to improve the performance of electronic devices. Gordon Moore, the cofounder of Intel, predicted in 1965 that the number of devices in an integrated circuit would increase by a factor of approximately two every 18 months. In other words, the dimensions of the devices would decrease by half [1]. Due to such device shrinkage, the price of a transistor has decreased by 25% * Hassan Khalesi h.khalesi@iau‑garmsar.ac.ir * Vahid Ghods [email protected] Tahereh Radsar dt.radsar@iau‑garmsar.ac.ir 1
Department of Electronic Engineering, Garmsar Branch, Islamic Azad University, Garmsar, Iran
Department of Electronic Engineering, Semnan Branch, Islamic Azad University, Semnan, Iran
2
every year, while at the same time the electronics industry has grown by 17%. Silicon has been widely used in the semiconductor industry, and most electronics devices are based on silicon technology. The International Roadmap for Devices and Systems (IRDS) predicts that by 2021 tra
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