Impurities and Grain Size Modeling in Recrystallized Silicon
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Impurities and Grain Size Modeling in Recrystallized Silicon Valeri V. Kalinin1, Alexandre M. Myasnikov1, and Vladislav E. Zyryanov2 1 Department of Single Crystals and Silicon Structures, Institute of Semiconductors Physics, 13 Lavrent'ev Avenue, Novosibirsk, AK, 630090, Russian Federation 2 Department of Radiotechnic, Electronics and Physics, Novosibirsk State Technical University, 20 Marx Avenue, Novosibirsk, 630049, Russian Federation ABSTRACT In previous publications [1, 2 and 3], spreading resistance probe (SRP) measurements for quality control of metal induced lateral crystallization (MILC) of amorphous silicon (a-Si) were studied, and the mechanism of nickel diffusion was simulated using technology computer-aided design (TCAD) modeling. Now, we continue to present the explanation of experimental results by modeling with the Synopsys TCAD package, whereby models for resistivity vs. grain size in implanted recrystallized silicon layers are implemented and compared with experiments. Findings show that the SRP method can be used for the characterization of the MILC process of amorphous silicon and that a comparison of experimental and calculated data allows both a turn from qualitative to quantitative analysis of recrystallized silicon film and an estimate of grain size. It has been found that grain size depends on location in the MILC region and on the time and temperature of recrystallization. INTRODUCTION Amorphous silicon has attracted a great deal of interest as material for large area applications such as thin film transistors [4-9]. However, the field-effect mobility in amorphous silicon is very low. Solid phase crystallization (SPC) is a typical method to improve its structure, but the temperature of SPC is too high for large-area glass substrates to be used. Several metals, like Pd [10], Al [11] and Ni [12], crystallize amorphous silicon, upon contact, much faster than SPC does. Unfortunately, the addition of a great quantity of seed metal can induce the degradation of devices formed in amorphous silicon or reduce to zero almost all of the advantages of amorphous silicon recrystallization. A small quantity of seed metal, in turn, can cause non-optimal conditions of recrystallization. At the moment, MILC films consist of separated recrystallized regions, which can be studied by SRP measurements [2]. As known, the given method is used to provide data about spreading resistance in the layers and to receive, with great accuracy, the distribution of resistance in ultra-shallow junction (USJ) layers [13]. Using experimental data of SRP measurements received and described in [2], it is shown that carrier mobility in the boron ion implanted layer formed in the MILC region is up 65 % in comparison with mobility in the boron ion implanted layer formed in single crystalline silicon. It is also shown that, under different conditions, mobility can change from 24 cm2/Vs to 34 cm2/Vs, depending upon the time of recrystallization and the distance from the seeds. The program DIOS from package Synopsis TCAD
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