Investigation of Inherent Capacitive Effects in Linear Memristor Model
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ORIGINAL PAPER
Investigation of Inherent Capacitive Effects in Linear Memristor Model Jeetendra Singh 1 & Sanjeev Kumar Sharma 2 & Balwinder Raj 3 Received: 16 August 2020 / Accepted: 6 October 2020 # Springer Nature B.V. 2020
Abstract Memristor plays a vital role in the advancement of recent semiconductor technology and has become a promising candidate in stepping up its progress towards Moore’s law. It attracts the attention of researchers with its small dimension, non-volatility comparable to flash memory, low cost, and its exploitation in the building of highly dense integrated circuits. In this manuscript, a novel memristor model is developed by adding a parallel variable capacitor in the linear model of memristor of the HP’s lab. The modified model of the memristor is simulated in the Matlab and variation of the capacitance and reactive capacitance is observed with the input signal, conductive width, thickness of the device, and with the input signal frequency variations. Apart from this, C-V characteristics and charge-voltage pinched hysteresis loop is also plotted and analyzed. It is seen that the capacitance of the parallel capacitor varies with the variation of the conductive width and thus insulating thickness of memristor, similar to RON and ROFF in the linear memristor model. In the saturation condition, a capacitance of 2.4 × 10−11 F is attained while a capacitance of 7 × 10−13 F is attained in the depletion state of the memristor. Keywords Memristor . C-V characteristics . Pinched hysteresis loop . Capacitive reactance . Memristance
1 Introduction Leon O Chua in 1971 filled the missing link between charge and flux with a fourth fundamental electrical circuit element called Memristor apart from Resistor, Capacitor, and Inductor [1]. Chua and Yang in 1976 generalized the theory of memristor and predicted its broad area as memristive devices and systems based on nonlinear circuit theory [2]. After a great effort and a longtime of postulation, the memristor was first time fabricated and modeled in 2008 at HP labs [3]. The HP model showed some limitations such as clinging of states at boundaries and excess growth of conductive width at either side of the boundaries; known as boundary issues. Strukov et al. [4] experimentally found that few volts across a small dimension (say in nanoscale) produce an exponential electric field result in nonlinear dopant drift over the whole dimension. * Jeetendra Singh [email protected] 1
Department of ECE, NIT Sikkim, Ravangla, Sikkim, India
2
Department of ECE, NIT Jalandhar, Jalandhar, India
3
Department of ECE, NITTTR Chandigarh, Chandigarh, India
To resolve the boundaries issues and nonlinear drift, Joglekar et al., [5] proposed a nonlinear window function, which redistricted the extra growth of conductive width at the boundaries of the memristor. But this window function is unable to unlock the states when the polarity of the applied signal is altered and also it did not consider the nonlinear drift of the dopant in the conduction mechanism. Next win
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