Investigation of Lateral and Vertical Profiles Enhanced by Implantation
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ABSTRACT In shallow junction formation with junction depth below 0.1pm, enhanced diffusion control is essential. The purpose of this paper is to investigate the B enhanced diffusion by point defects, introduced by high dose implantation with amorphization. Ge ions were implanted to induce amorphization within the S/D region of pMOS. These results were compared with that of the B enhanced diffusion by point defects, induced by Si4 implant with non-amorphization. These results suggest that the B enhanced diffusion in lateral profiles is much smaller, compared with that in vertical profiles, when point defects were introduced by amorphization. INTRODUCTION As lateral device features are scaled to submicron dimensions, the junction depth must be reduced in order to suppress the short-channel effect. Preamorphization by Si' or Ge' implants has been used in shallow junction technologies. Principal concerns with preamorphization are the point defect formation near the amorphous/crystalline interface, the defect diffusions during annealing, and dopant profile broadening. In the formation of the shallow junction below 0.1 p m, the influence of dopant enhanced diffusion reflects sensitively on junction depth. Therefore, it is important to investigate and control the influence of point defects, introduced by high dose implantation with amorphization. It is reported that the magnitude of diffusion4 enhancement is related to the produced point defects at low dose region below Ix101 /cm2 with nonamorphization[ 1]-[3]. However, few papers have been reported on the influence of point defects introduced by amorphization. In this paper, lateral and vertical profiles have been investigated and these results are compared with the profiles withoit amorphization. The influence of boron enhanced diffusion by the point defects was evaluated from the boron redistribution. The vertical and lateral profiles were measured by SIMS and the electrical method, such as effective channel length, respectively. EXPERIMENTAL Figure 1 shows a schematic cross section of the pMOS transistor and the processing steps. Diodes and MOS transistors regions were isolated with the standard LOCOS process. The gate oxide thickness was 6.5nm. Conventional single-drain pMOS transistors were fabricated. Source/drain (S/D) regions were formed by BF 2+ implantation at the energy of 10keV and at the dose of 3x10 15/cm2. The activation of implanted dopants was carried out by rapid thermal annealing (RTA) at 10000 C for 10sec. Then the boron profiles were measured by secondary ion mass spectrometry (SIMS) and the junction depth, defined at the background concentration of 1x10 17/cm 3 was approximately 0.13 pm. Ge ions were then implanted at energies ranging from 20 to 70keV with a dose of lx10'5/cm2 to induce amorphization within the S/D region (Ge ions didn't reach the junction of S/D region). On the other hand, Si ions were implanted at 120 keV with the doses ranging from lxlI to lx1014/cm2 in order to introduce point defects with non-amorphization, and the projected ra
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