Investigation of SET and RESET States Resistance in Ohmic Regime for Phase-Change Memory
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1072-G06-09
Investigation of SET and RESET States Resistance in Ohmic Regime for Phase-Change Memory Semyon D. Savransky, and Ilya V Karpov Intel Corporation, Santa Clara, CA, 94054 ABSTRACT A method to determine RESET (glassy) and SET (polycrystalline) resistivities as well as specific contact resistance in phase-change memory (PCM) is proposed. The average activation energies for conductivity are about 0.37 and 0.09 eV while bulk resistivities are about 1 kOhm•cm and 20 mOhm•cm for glassy and polycrystalline Ge2Sb2Te5 respectively. The contact barrier is about 0.07eV and specific contact resistance is about 0.3 µOhm•cm2 in our PCM devices. It is discovered that bulk resistivities for both SET and RESET states in PCM obey the Meyer-Neldel rule with almost identical isokinetic temperatures 335K – 340K. INTRODUCTION The phase-change memory (PCM) is based on the ability of alloys to rapidly change stable status from high conductive (SET) polycrystalline to high resistive glassy (RESET) states under fast electrical pulses [1]. Ge2Sb2Te5 (GST) electrical properties have been reported mostly from studies of thin films. But the glassy form of GST in RESET state is likely different from its amorphous form found in thin films [2]. We also cannot exclude the possibility that crystal structure created in SET state under electrical fields, temperature and mechanical stress gradients is different from crystal structure obtained for relatively long thermal anneals of amorphous films. Hence, it is important to know electrical properties of GST in actual PCM devices. Furthermore, interface properties are critical for many semiconductor devices and their importance increase for PCM especially with scaling below 50nm [3]. Therefore, the studies of the electrical properties of PCM materials and the interfaces between the electrodes and the PCM material in the actual memory cells are vital for development of PCM technology. EXPERIMENT PCM analytical cells [4] with 30, 50 and 100 nm thick GST as well as devices without GST were used for the experiments. The devices were programmed either to minimum SET resistance or to saturation of RESET resistance using HP8110A pulse generator. HP4156 semiconductor analyzer was used to collect DC measurements of current-voltage characteristics from 0 to 0.5V at temperatures from 30 to 850C. All resistance data reported in this paper were taken at 0.1V bias in the Ohmic regime, where PCM current I linearly proportional to voltage V.
DISCUSSION We used total resistances measured in identical PCM devices with different phase-change alloy thicknesses, L, at various ambient temperatures, T, to extract GST bulk and interface properties. The total resistance Rtotal of a two terminal PCM device consists of three terms: Rtotal = RGST + Relectrodes + Rinterface
(1).
Here RGST is the bulk GST resistance (which is different in SET or RESET states), Relectrodes is the resistance of electrodes and Rinterface is the interface (contact) resistance. Relectrodes was measured for devices fabricated without GST. Fo
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