Logic Synthesis for Finite State Machines Based on Linear Chains of States
This book discusses Moore finite state machines (FSMs) implemented with field programmable gate arrays (FPGAs) including look-up table (LUT) elements and embedded memory blocks (EMBs). To minimize the number of LUTs in FSM logic circuits, the authors prop
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Alexander Barkalov Larysa Titarenko Jacek Bieganowski
Logic Synthesis for Finite State Machines Based on Linear Chains of States Foundations, Recent Developments and Challenges
Studies in Systems, Decision and Control Volume 113
Series editor Janusz Kacprzyk, Polish Academy of Sciences, Warsaw, Poland e-mail: [email protected]
About this Series The series “Studies in Systems, Decision and Control” (SSDC) covers both new developments and advances, as well as the state of the art, in the various areas of broadly perceived systems, decision making and control- quickly, up to date and with a high quality. The intent is to cover the theory, applications, and perspectives on the state of the art and future developments relevant to systems, decision making, control, complex processes and related areas, as embedded in the fields of engineering, computer science, physics, economics, social and life sciences, as well as the paradigms and methodologies behind them. The series contains monographs, textbooks, lecture notes and edited volumes in systems, decision making and control spanning the areas of Cyber-Physical Systems, Autonomous Systems, Sensor Networks, Control Systems, Energy Systems, Automotive Systems, Biological Systems, Vehicular Networking and Connected Vehicles, Aerospace Systems, Automation, Manufacturing, Smart Grids, Nonlinear Systems, Power Systems, Robotics, Social Systems, Economic Systems and other. Of particular value to both the contributors and the readership are the short publication timeframe and the world-wide distribution and exposure which enable both a wide and rapid dissemination of research output.
More information about this series at http://www.springer.com/series/13304
Alexander Barkalov Larysa Titarenko Jacek Bieganowski •
Logic Synthesis for Finite State Machines Based on Linear Chains of States Foundations, Recent Developments and Challenges
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Alexander Barkalov Institute of Metrology, Electronics and Computer Science University of Zielona Góra Zielona Góra Poland
Jacek Bieganowski Institute of Metrology, Electronics and Computer Science University of Zielona Góra Zielona Góra Poland
Larysa Titarenko Institute of Metrology, Electronics and Computer Science University of Zielona Góra Zielona Góra Poland
ISSN 2198-4182 ISSN 2198-4190 (electronic) Studies in Systems, Decision and Control ISBN 978-3-319-59836-9 ISBN 978-3-319-59837-6 (eBook) DOI 10.1007/978-3-319-59837-6 Library of Congress Control Number: 2017944290 © Springer International Publishing AG 2018 This work is subject to copyright. All rights are reserved by the Publisher, whether the whole or part of the material is concerned, specifically the rights of translation, reprinting, reuse of illustrations, recitation, broadcasting, reproduction on microfilms or in any other physical way, and transmission or information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed. The use of general descriptive names, registered names, tra
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