Long-Term Reliability of Nanometer VLSI Systems Modeling, Analysis a
This book provides readers with a detailed reference regarding two of the most important long-term reliability and aging effects on nanometer integrated systems, electromigrations (EM) for interconnect and biased temperature instability (BTI) for CMOS dev
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liability of Nanometer VLSI Systems Modeling, Analysis and Optimization
Long-Term Reliability of Nanometer VLSI Systems
Sheldon Tan • Mehdi Tahoori • Taeyoung Kim Shengcheng Wang • Zeyu Sun • Saman Kiamehr
Long-Term Reliability of Nanometer VLSI Systems Modeling, Analysis and Optimization
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Sheldon Tan Department of Computer Science and Engineering University of California Riverside, CA, USA Taeyoung Kim Department of Electrical & Computer Engineering University of California Riverside, CA, USA
Mehdi Tahoori Karlsruhe Institute of Technology Karlsruhe, Germany Shengcheng Wang Karlsruhe Institute of Technology Karlsruhe, Germany Saman Kiamehr Robert Bosch Starter Generator GmbH Stuttgart, Germany
Zeyu Sun Department of Electrical & Computer Engineering University of California Riverside, CA, USA
ISBN 978-3-030-26171-9 ISBN 978-3-030-26172-6 (eBook) https://doi.org/10.1007/978-3-030-26172-6 © Springer Nature Switzerland AG 2019 This work is subject to copyright. All rights are reserved by the Publisher, whether the whole or part of the material is concerned, specifically the rights of translation, reprinting, reuse of illustrations, recitation, broadcasting, reproduction on microfilms or in any other physical way, and transmission or information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed. The use of general descriptive names, registered names, trademarks, service marks, etc. in this publication does not imply, even in the absence of a specific statement, that such names are exempt from the relevant protective laws and regulations and therefore free for general use. The publisher, the authors, and the editors are safe to assume that the advice and information in this book are believed to be true and accurate at the date of publication. Neither the publisher nor the authors or the editors give a warranty, express or implied, with respect to the material contained herein or for any errors or omissions that may have been made. The publisher remains neutral with regard to jurisdictional claims in published maps and institutional affiliations. This Springer imprint is published by the registered company Springer Nature Switzerland AG. The registered company address is: Gewerbestrasse 11, 6330 Cham, Switzerland
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Foreword
The analysis and optimization of circuit reliability has become one of the most critical challenges for high-performance digital circuits. While the underlying phenomena—bias temperature instability (BTI), hot-carrier injection (HCI), timedependent dielectric breakdown (TDDB), and electromigration (EM)—have been known for many years, our understanding of the underlying physics has greatly improved over the past decade or so. Initially, such investigations were largely confined to device reliability researchers, but as these phenomena have begun to rear their heads in commercial designs and conventional models have fallen short, the scope of this research has expanded. There has been
