Low Defect Ceria for ILD CMP
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Low Defect Ceria for ILD CMP Jai Kasthurirangan, John Parker, Tiffany Bettis, and Charles Dowell Cabot Microelectronics Corporation, 870 N Commons Dr, Aurora, IL, 60504 ABSTRACT The reduction of wafer scratching is a key goal driving the commercial development of CMP slurries. To better understand the underlying abrasive particle properties critical to the scratch performance of ILD CMP slurries, the scratching behavior of ceria slurries prepared with a range of particle size characteristics are characterized. Scratch results are presented and two effects are proposed to account for the findings. The Removal Rate Effect relies solely on the observed inverse proportionality between scratching and removal rate. This interpretation is consistent with a simple surface balance of scratches but suggests that removal rate differences dominate scratch performance. The Managed Tail Effect considers the effect of particle characteristics on both the creation and the removal of scratches. For a given particle population, the larger particles are assumed to dominate scratch creation. However, larger particles are also seen to drive removal rate which affects the removal of scratches during polishing. This interpretation implies that optimal scratch performance for a ceria ILD CMP slurry will be obtained when the width of the ceria particleís size distribution is optimized relative to its mean. INTRODUCTION The planarization of Inter-Layer Dielectric (ILD) levels during IC processing is perhaps the best established and well understood of CMP processes. Nevertheless, there is still very little fundamental understanding of key slurry characteristics that affect scratch defectivity. Studies with silica slurries have correlated the onset of scratches with the presence of larger particles in the slurry 1, 2, 3. This understanding is further supported by numerous investigations demonstrating scratch reduction through improved slurry filtration. While particle size is understood to be important, there are few published reports on other characteristics of scratchinducing particles. Some researchers have attempted to correlate the shape of Al2O3 and SiO2 particles with their ability to abrade 4, 5, but there exists a practical disconnect in how to apply these particle properties in the optimization of the large particle fraction when designing a slurry. This lack of understanding is even more apparent in the case of ceria-based CMP which is a more recent development relative to silica and alumina based CMP. Thus there is an overall need to establish an understanding of particle characteristics that dictate defect performance. EXPERIMENT Polishing experiments were carried out on unpatterned 200mm TEOS wafers using an Applied Materials, Inc. Mirraô polisher. The polishing pad was an IC1000ô with k-grooves on a Suba IV flat sub-pad. Platen/Head speeds were set at 100/118 RPM. Head pressure settings were 3.0/ 3.5/ 3.0 PSI for Inner-tube/ Retaining ring/ Membrane. After a 60s polishing step on platen 1, the wafers were buffed for
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