Median Selection for Calibrating the Capacitor Mismatch to Improve the Linearity of Analog-to-Digital Converter
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Median Selection for Calibrating the Capacitor Mismatch to Improve the Linearity of Analog-to-Digital Converter Hua Fan1
· Chen Wang1 · Quanyuan Feng2
Received: 15 November 2019 / Revised: 16 April 2020 / Accepted: 18 April 2020 © Springer Science+Business Media, LLC, part of Springer Nature 2020
Abstract This paper presents a capacitor calibration technique called median selection for improving the static and dynamic performance of the successive approximation register (SAR) analog-to-digital converter (ADC). Monte Carlo simulations in MATLAB are presented to demonstrate the effect of the proposed method. Simulation results show that for an 18-bit RC-hybrid SAR ADC with the mismatch of the unit capacitor (σu = σ0 Cu ) of 0.05%, the root mean square (rms) of differential nonlinearity is improved by 94.7%–0.23 LSB and the rms of integral nonlinearity is promoted by 96.7%–0.20 LSB by the proposed median selection. On the other hand, the median selection improves the mean value of the spurious free dynamic range from 94.09 to 128.85 dB, while the mean value of the signal-to-noise-and-distortion ratio is improved from 88.70 to 109.82 dB. Keywords Analog-to-digital converter (ADC) · Successive approximation register (SAR) · Capacitor mismatch calibration · Median selection
The work of Hua Fan was supported by the National Natural Science Foundation of China (NSFC) under Grant 61771111, supported by Sichuan Provincial Science and Technology Important Projects under Grant 19ZDYF2863, as well as supported by China Postdoctoral Science Foundation under Grants 2017M612940 and 2019T120834 and Special Foundation of Sichuan Provincial Postdoctoral Science Foundation. The work of Quanyuan Feng was supported by the National Natural Science Foundation of China (NSFC) under Grant 61531016, supported by Sichuan Provincial Science and Technology Important Projects under Grants 2018GZ0139, 2018ZDZX0148, and 2018GZDZX0001.
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Hua Fan [email protected] Chen Wang [email protected] Quanyuan Feng [email protected]
1
School of Electronic Science and Engineering, University of Electronic Science and Technology of China, Chengdu, China
2
School of Information Science and Technology, Southwest Jiaotong University, Chengdu, China
Circuits, Systems, and Signal Processing
1 Introduction In the era of intelligence, digital signals are involved in a multitude of aspects of life. In devices such as touch screens, microphones, and cameras, analog-to-digital converters (ADCs) convert analog signals such as position, sound, and light into digital signals, enabling high-speed propagation of information. In the 5G era, the transmission rate will reach Gbps [17]. The communication between the mobile phone and the base station relies on analog electromagnetic signals. It also requires high-performance ADCs to convert analog signals into digital signals, so that pictures and videos can appear in mobile phones. There is no doubt that ADCs and digital-to-analog converters (DACs) are important foundations in the digital world. However, their
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