Memory-Optimized Software Synthesis from Dataflow Program Graphs with Large Size Data Samples
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Memory-Optimized Software Synthesis from Dataflow Program Graphs with Large Size Data Samples Hyunok Oh The School of Electrical Engineering and Computer Science, Seoul National University, Seoul 151-742, Korea Email: [email protected]
Soonhoi Ha The School of Electrical Engineering and Computer Science, Seoul National University, Seoul 151-742, Korea Email: [email protected] Received 28 February 2002 and in revised form 15 October 2002 In multimedia and graphics applications, data samples of nonprimitive type require significant amount of buffer memory. This paper addresses the problem of minimizing the buffer memory requirement for such applications in embedded software synthesis from graphical dataflow programs based on the synchronous dataflow (SDF) model with the given execution order of nodes. We propose a memory minimization technique that separates global memory buffers from local pointer buffers: the global buffers store live data samples and the local buffers store the pointers to the global buffer entries. The proposed algorithm reduces 67% memory for a JPEG encoder, 40% for an H.263 encoder compared with unshared versions, and 22% compared with the previous sharing algorithm for the H.263 encoder. Through extensive buffer sharing optimization, we believe that automatic software synthesis from dataflow program graphs achieves the comparable code quality with the manually optimized code in terms of memory requirement. Keywords and phrases: software synthesis, memory optimization, multimedia, dataflow.
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INTRODUCTION
Reducing the size of memory is an important objective in embedded system design since an embedded system has tight area and power budgets. Therefore, application designers usually spend significant amount of code development time to optimize the memory requirement. On the other hand, as system complexity increases and fast design turn-around time becomes important, it attracts more attention to use high-level software design methodology: automatic code generation from block diagram specification. COSSAP [1], GRAPE [2], and Ptolemy [3] are wellknown design environments, especially for digital signal processing applications, with automatic code synthesis facility from graphical dataflow programs. In a hierarchical dataflow program graph, a node, or a block, represents a function that transforms input data streams into output streams. The functionality of an atomic node is described in a high-level language such as C or VHDL. An arc represents a channel that carries streams of data samples from the source node to the destination node. The number of samples produced (or consumed) per node
firing is called the output (or the input) sample rate of the node. In case the number of samples consumed or produced on each arc is statically determined and can be any integer, the graph is called a synchronous dataflow graph (SDF) [4] which is widely adopted in aforementioned design environments. We illustrate an example of SDF graph in Figure 1a. Each arc is annotated with the number of samples consumed or pro
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