Morphology and Step Coverage of In-Situ Doped Polysilicon Films Deposited by Single Wafer CVD
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These single wafer results are
interpreted using published reaction mechanisms for in-situ doped polysilicon processes [2-8]. In-situ doping of polysilicon is shown to be an enabling technology for the manufacture of advanced 0.35 4i m fast SRAM devices. EXPERIMENTAL PROCEDURE In-situ doped polysilicon films were deposited in a mechanically pumped load locked single wafer LPCVD cluster tool, the Applied Materials Centura HT, which has a base pressure in the range of 10 mTorr. The polysilicon deposition chamber employs lamp heating to maintain a cold-wall configuration. The wafer handling chamber of the Centura HT has ports to support as many as three different process chambers. Three different polysilicon deposition temperatures were employed: 590, 620, and 640°C. All of the depositions were carried out at a pressure of 80 Torr using 400 SCCM of Sil4 as the silicon source gas, along with a flow of 4.0 SLM of hydrogen. Dopant sources consisted of electronic grade B2H6, AsH3, and PH3 gases which were all 1% in hydrogen. Three different flow rates of the diluted dopant gases were used: 80, 200 and 290 SCCM. The wafer was rotated by a magnetically coupled feedthrough at -10 rpm during deposition to ensure good cross-wafer uniformity. The target thickness for all of the film depositions in this work was -1500A. Wafers used in this work were 125 mm dia. (100) silicon with a 1,000A thick layer of thermally grown silicon dioxide. Wafers for step coverage analysis were 89 Mat. Res. Soc. Symp. Proc. Vol. 355 01995 Materials Research Society
prepared by depositing -3.0 gm of borophosphosilicate glass (BPSG) and etching a pattern of 0.8 gim wide lines and spaces into the BPSG layer to form trenches with -2.6:1 aspect ratio after etch. Step coverage values of deposited films were measured from cleaved and stained samples by SEM. Step coverage is defined as the percentage of the planar film thickness measured at the bottom of the step inside the trench. Measurements of surface roughness were performed by atomic force microscopy (AFM). Sheet resistance readings were taken with a Prometrix four point probe. Prior to sheet resistance measurements, the wafers were given a brief rapid thermal anneal (30 sec at 900°C) to ensure good dopant activation. All thickness measurements were performed with a Nanometrics 215 AFT system. RESULTS Results from "standard" processes, shown in Table I., indicate that films
deposited in a single wafer CVD reactor with in-situ doping are suitable IC process
integration. Sheet resistance values are fairly low - in the range of 40 to -300 Q/sq. The RMS surface roughness values for As and P dopants are comparable to undoped polysilicon, whereas boron is somewhat rougher. The deposition rate data in Fig. 1 shows how in-situ doping changes the kinetics of the polysilicon deposition reaction. Compared to the undoped polysilicon, boron in-situ doping enhances the deposition rate by a factor of -2, whereas phosphorus and arsenic both reduce the deposition rate by nearly half. In Fig. 2, corresponding sheet
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