Nitrided Hafnium Silicate Film Formation by Sequential Process Using a Hot Wall Batch System and Its Application to MOS
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Nitrided Hafnium Silicate Film Formation by Sequential Process Using a Hot Wall Batch System and Its Application to MOS Transistor Tomonori Aoyama, Kazuyoshi Torii, Riichirou Mitsuhashi, Takeshi Maeda, Satoshi Kamiyama, Atsushi Horiuchi, Hiroshi Kitajima and Tsunetoshi Arikado Research Dept. 1, Semiconductor Leading Edge Technologies, Inc. 16-1 Onogawa, Tsukuba 305-8569, Japan ABSTRACT High quality HfSiON/SiO2 gate dielectrics were successfully formed using a hot wall batch system, which is suitable for mass production. The carbon contamination at HfSiON/SiO2 interface was reduced by a sequential process of the interfacial layer (IL) formation and HfSiOx metal organic chemical vapor deposition (MOCVD). The O3 treatment was found effective to reduce the residual carbon and hydrogen, while the NH3 treatment made the HfSiOx to be HfSiON, which was effective to prevent the phase separation and crystallization during the activation annealing. The NH3 treatment temperature above 700°C is necessary to suppress the boron penetration during the activation annealing at 1050°C for 1 sec in p-channel field effect transistor (p-FET). Equivalent oxide thickness (EOT) of 1.37 nm was achieved for HfSiON (3nm)/SiO2(0.5nm) gate stack using poly-Si electrode. High effective mobility of 271/62 cm2/Vs (n/p at 0.8 MV/cm) was obtained. INTRODUCTION Recently, HfSiON has received much attention as a gate dielectric material for 65 nm-node complementary metal oxide semiconductor field effect transistors (CMOSFETs) because of its good thermal stability above 1000°C and relatively high carrier mobility [1-3]. In this paper, we propose the novel HfSiON fabrication processes; (1) continuous formation of ultra thin SiO2 IL and HfSiOx film using a multi-functional hot wall batch system, (2) HfSiOx formation by MOCVD using hafnium tetra-t-butoxide (HTB) and Si2H6 without oxidizing gas, (3) post deposition treatment (PDT) such as O3 treatment and NH3 treatment using the same MOCVD chamber. Physical properties of HfSiON film and electrical properties of FETs with the HfSiON gate dielectric formed by these novel processes are also reported. EXPERIMENTAL DETAILS The schematic diagram of the batch type MOCVD tool used in this work is shown in Fig. 1. Reaction chamber is made of quartz and the outside heater controls substrate temperature. 33 slices of 300 mm wafers can be processed at once. Oxygen concentration in the loading area is kept below 6 ppm to suppress the oxidization of silicon substrate surface while the wafers are loaded into the reaction chamber. HTB is delivered to vaporizer maintained at 60°C using a liquid mass flow controller and the vaporized HTB is introduced into the reaction chamber with carrier He gas. Right after dilute HF solution (DHF) treatment, 0.5 nm-thick SiO2 layers were formed on wafers using water vapor at 650°C for 10 min at 0.76 Torr. Water vapor is generated from H2
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Exhaust MFC Vaporizer
H2O
z S/D pad fo rmation & ILD CVD z Gate trench etching
He
z DHF treat ment
O3 NH3
LMFC
z Well & S/D forma
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