Novel Dielectric Materials for Organic Electronics
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NOVEL DIELECTRIC MATERIALS FOR ORGANIC ELECTRONICS Antonio Facchetti*, Myung-Han Yoon, He Yan, and Tobin J. Marks* Department of Chemistry and the Materials Research Center, Northwestern University, 2145 Sheridan Road, Evanston, Illinois 60208-3113, USA. ABSTRACT We present our latest results on the design and fabrication of very high capacitance dielectric materials for organic field-effect transistors. We will show that utilization of appropriate self-assembling siloxane building blocks and polymer matrices allows solutionprocessed, pinhole-free organic dielectrics. Electrical (MIS, TFT) data demonstrate that these insulators can be efficiently integrated into large TFT structures. These devices function for both p- and n-channel semiconductors, the molecular components of which exhibit greatly different core structures and substituent functionalities. Substantial TFT response is achieved at very low operational biases (< 1V), without serious leakage currents (< 10-8 A/cm at 1V). INTRODUCTION Field effect transistors based on molecular and polymeric materials (OFETs) may find applications in low-performance memory elements such as RF-ID card as well as integrated optoelectronic devices, such as pixel drive and switching elements in active-matrix organic light-emitting diode (LED) displays. 1 These systems have been widely investigated since they offer numerous advantages for easy evaporation/solution processing and good compatibility with a variety of substrates including flexible plastics, and great opportunities for structural modifications. 2 The simplest and most common OFET device configuration is that of a thinfilm transistor (TFT), in which a thin film of the organic semiconductor is deposited on top of a dielectric with an underlying gate (G) electrode. Charges are injected from the source (S) electrode and collected at the drain (D) electrode. These contacts are defined either on top of the organic film (top-configuration) or on the surface of the FET substrate prior to the deposition of the semiconductor (bottom-configuration). The current between S and D electrodes (ISD) is low when no voltage is applied between G and D electrodes, and the device is in the so called ‘off’ state. When a voltage is applied to the gate, charges can be induced into the semiconducor at the interface with the dielectric layer (‘on’ state of a transistor) resulting in 2 a ISD given by: IDS = W / 2 LμCi [VG − VT ] (Eq. 1). The key parameters in characterizing a FET are the field-effect mobility (μ) which quantifies the average charge carrier drift velocity per unit electric field and the on/off ratio (Ion:Ioff) defined as the D–S current ratio between the ‘on’ and ‘off ’ states, and the threshold voltage (VT). For a high performance OFET, the field-effect mobility and on/off ratio should both be as high as possible and VT should be close to zero. The dielectric of choice for testing organic semiconductor based OFETs is thermally grown SiO2, usually a 100-300 nm-thick film. 3,4 However, practical OFET applications will r
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