Oxide Thin Films Fabricated with Metal Alkoxides as Oxygen Sources
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applied, the induced torque causes the pieces to rotate out of the plane on tiny hinges and lock into place. Chang Liu, a professor of electrical and computer engineering and director of the Micro Actuators, Sensors, and Systems Laboratory at UIUC, said, “By varying the amount of magnetic material attached to the flaps, we can control the speed at which the parts fold into position. This creates a sequential assembly process that can significantly improve the speed and efficiency of fabricating large arrays of 3D structures.” Magnetic actuation could be used to create arrays of neural probes, micro-optical devices, or miniature testing devices for integrated circuits, Liu said. The fabrication process also makes possible the development of a modular building block for the construction of a new class of integrated microsensors. Liu has recently teamed up with UIUC entomologist and neurobiologist Fred Delcomyn to develop a microintegrated sensor that mimics the action of a hair cell. “The hair cell is a very fundamental structure consisting of a long cilia attached to a neuron,” Liu said. “Nature uses this basic building block in a variety of ways to accomplish such sensing tasks as hearing, balance, and touch.” The use of microelectromechanical fabrication techniques offers opportunities for creating artificial hair cells with a size scale and frequency response comparable to their biological counterparts, Liu said. The resulting sensors could be used in many applications, including autonomous robots that more fully perceive and respond to their environment. Liu presented this work at the NASA Nanospace 2000 meeting in January, and will present related work at the World Congress on Medical Physics and Biomedical Engineering, July 23–28 in Chicago, and at an IEEE meeting in October in Arizona.
Reliable 1.6-nm Gate Oxides Produced Silicon chips may reach their performance limits several years later than previous predictions, according to researchers at Lucent Technologies/Bell Labs. A limiting factor in producing increasingly smaller and faster silicon-based transistors is the transistor’s insulating layer. Made of silicon dioxide, the insulating layer on chips currently averages 12 atomic layers thick. While various research groups have said that 9–10 atoms would be the thinnest insulating layer for reliable, practical silicon chips, Ashraful Alam of Lucent Technologies/Bell Labs and his colleagues have shown that the intrinsic reliability 6
High-resolution transmission electron microscopy image showing a 1.6-nm gate oxide. (Credit: Frieder Baumann, Lucent Technologies/Bell Labs.)
limit is fewer than six atoms, or 1.5 nm. As a result, the researchers concluded that the “doomsday” scenario for the conventional silicon chip might be delayed until after 2005, instead of the next couple of years, as had been predicted. The insulating layer, also known as the gate oxide, is the device’s smallest feature. It lies between the transistor’s gate electrode, which turns current flow on and off, and the channel through which
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