P + implanted 6H-SiC n + -i-p diodes: evidence for a post-implantation-annealing dependent defect activation
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P+ implanted 6H-SiC n+-i-p diodes: evidence for a post-implantation-annealing dependent defect activation R. Nipoti, M. Puzzanghera, and F.Moscatelli CNR-IMM, UOS of Bologna, via Gobetti 101, 40129 Bologna, Italy
ABSTRACT Two n+-i-p 6H-SiC diode families with P+ ion implanted emitter have been processed with all identical steps except the post implantation annealing: 1300°C/20min without C-cap has been compared with 1950°C/10min with C-cap. The analysis of the temperature dependence of the reverse current at low voltage (-100V) in the temperature range 27-290°C shows the dominance of a periphery current which is due to generation centers with number and activation energy dependent on the post implantation annealing process. The analysis of the temperature dependence of the forward current shows two ideality factor n region, one with n = 1.9/2 at low voltage and the other one with 1 < n < 2 without passing through 1 for increasing voltages. For both the diode families the current with n = 1.9/2 is a periphery current due to recombination centers with a thermal activation energy near the 6H-SiC mid gap. In the forward current region of 1 < n < 2, the two diode families show different ideality factor values which could be attributed to a different post implantation annealing defect activation. INTRODUCTION The use of a pyrolysed resist film (C-cap) prevents the SiC surface degradation during very high temperature treatments [1]. This has permitted to demonstrate the beneficial effect on the electrical activation of ion implanted dopants when increasing the post implantation annealing temperature from 1600°C to 2100°C [2-4]. At the same time it has permitted to study the effect of a 1600-1950°C thermal treatment on as-grown epitaxial 4H-SiC materials: C-vacancies, which are life-time killer defects, are generated in the material volume with concentration increasing with the increasing of the temperature [5]. Nevertheless it has been also shown that a “C+ ion implantation plus 1550°C annealing” process can be optimized to reduce the C-vacancies concentration in the un-implanted SiC depth [6-7]. Implanted dopant concentration > 5×1019 cm-3 and very high temperature post implantation annealing can be used for ohmic contact regions and also as efficient sources for minority carriers injection into the active regions of electronic devices [8] which require an interface of good electronic quality between implanted and un-implanted volumes. It has been shown that implanted dopant concentration of about 2-3×1020 cm-3 and 1800°C post implantation annealing give origin to extrinsic staking faults along the basal plane direction. These defects from the un-implanted volume penetrate into the implanted layer and have such a density to produce a tilt of the implanted layer with respect to the original orientation [9]. It has also been shown that the current voltage characteristics of p+-i-n 4H-SiC diodes with 1×1020 cm-3 Al+ implanted emitter and different post implantation annealing temperatures evidence a defect activation which i
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