Post-Silicon and Runtime Verification for Modern Processors

Post-Silicon and Run-Time Verification for Modern Processors surveys the state of the art and evolving directions in post-silicon and runtime verification. The volume gives an overview of the state of the art in verification, particularly current post-sil

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Ilya Wagner • Valeria Bertacco

Post-Silicon and Runtime Verification for Modern Processors

Ilya Wagner Platform Validation Engineering Group Intel Corporation Hillsboro, Oregon USA [email protected]

Valeria Bertacco Department of Electrical Engineering and Computer Science University of Michigan Ann Arbor, Michigan USA [email protected]

ISBN 978-1-4419-8033-5 e-ISBN 978-1-4419-8034-2 DOI 10.1007/978-1-4419-8034-2 Springer New York Dordrecht Heidelberg London © Springer Science+Business Media, LLC 2011 All rights reserved. This work may not be translated or copied in whole or in part without the written permission of the publisher (Springer Science+Business Media, LLC, 233 Spring Street, New York, NY 10013, USA), except for brief excerpts in connection with reviews or scholarly analysis. Use in connection with any form of information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed is forbidden. The use in this publication of trade names, trademarks, service marks, and similar terms, even if they are not identified as such, is not to be taken as an expression of opinion as to whether or not they are subject to proprietary rights. Printed on acid-free paper Springer is part of Springer Science+Business Media (www.springer.com)

To my niece Ellie, who showed me the miracle of learning. Ilya Wagner

To all my students, who make working in the field of verification such a rewarding experience. Valeria Bertacco

Preface

The growing complexity of modern processor designs and their shrinking production schedules cause an increasing number of errors to escape into released products. Many of these escaped bugs can have dramatic effects on the security and stability of consumer systems, undermine the image of the manufacturing company and cause substantial financial grief. Moreover, recent trends towards multi-core processor chips, with complex memory subsystems and sometimes non-deterministic communication delays, further exacerbate the problem with more subtle, yet more devastating, escaped bugs. This worsening situation calls for high-efficiency and high-coverage verification methodologies for systems under development, a goal that is unachievable with today’s pre-silicon simulation and formal validation solutions. In light of this, functional post-silicon validation and runtime verification are becoming vitally important components of a modern microprocessor development process. Post-silicon validation leverages orders of magnitude performance improvements over pre-silicon simulation while providing very high coverage. Runtime verification solutions augment the hardware with on-chip monitors and checking modules that can detect erroneous executions in systems deployed in the field and recover from them dynamically. The purpose of this book is to present and discuss the state of the art in postsilicon and runtime verification techniques: two very recent and fast growing trends in the world of microprocessor design and veri