Reliability Analysis of Triple-Redundant CompactPCI SBC
Embedded systems based on field-programmable gate arrays (FPGAs) are popularly used in space system. However, as FPGA is especially susceptible to radiation generated by special particles which could lead to soft errors, it is quite important to adopt fau
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Reliability Analysis of Triple-Redundant CompactPCI SBC Peng Wang and Yan Bai
Abstract Embedded systems based on field-programmable gate arrays (FPGAs) are popularly used in space system. However, as FPGA is especially susceptible to radiation generated by special particles which could lead to soft errors, it is quite important to adopt fault-tolerance technologies to mitigate these problems. In this paper, the research object—a CompactPCI SBC with advanced safety features could realize the functionality of three-redundant systems on a single board. Its complex FPGA-based design technology, which automatically manages the system’s triple-redundant processors and memory, could help dramatically lower software development costs. Reliability assessment technology is introduced to quantitatively evaluate the performance of the CompactPCI SBC. From the hardware architecture and fault tree models of redundancy configurations, probability of failure on demand (PFD) calculation formulas and the corresponding safety integrity level (SIL) for each component unit could be derived. Keywords CompactPCI SBC redundant
Fault tolerance Reliability analysis Triple
42.1 Introduction With the development of digital information technology, embedded system design has been widely used. Due to the advantages of low volume, low power, and high integration, embedded systems based on field-programmable gate arrays (FPGAs) P. Wang (&) Y. Bai School of Control and Computer Engineering, North China Electric Power University, Beijing 102206, China e-mail: [email protected]
Z. Zhong (ed.), Proceedings of the International Conference on Information Engineering and Applications (IEA) 2012, Lecture Notes in Electrical Engineering 218, DOI: 10.1007/978-1-4471-4847-0_42, Springer-Verlag London 2013
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are popular applied in space system [1, 2]. However, as FPGA is especially susceptible to radiation generated by special particles which can lead to soft errors, the adoption of fault-tolerance technologies to mitigate these problems is an increasingly important subject [3–5]. Triple modular redundancy (TMR) is taken as a frequently used fault tolerance technology for the FPGA design to resist single-event upset (SEU) [6]. TMR has been shown to significantly improve the reliability of FPGA designs, but it is very expensive in terms of circuit area and power costs. Due to resource and system constrains, it is not possible to realize TMR for the entire design, but sacrifice some reliability and apply TMR to parts of the FPGA design. Partial triplication of the FPGA design cannot reach the same reliability level provided by the full TMR, so it must focus on the components which most affect the reliability of the whole system. In this paper, the research object is a CompactPCI SBC with advanced safety features that realize the functionality of three-redundant systems on a single board [7, 8]. Its complex FPGA-based design technology, which automatically manages the system’s triple-redundant processor unit and
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