Stacked Boron Doped Poly-Crystalline Silicon-Germanium Layers: an Excellent MEMS Structural Material
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1075-J05-02
Stacked Boron Doped Poly-Crystalline Silicon-Germanium Layers: an Excellent MEMS Structural Material Gert Claes1,2, Gregory Van Barel1,3, Rita Van Hoof1, Bert Du Bois1, Maria Gromova1, Agnes Verbist1, Tom Van der Donck2, Stefaan Decoutere1, Jean-Pierre Celis2, and Ann Witvrouw1 1 IMEC, Leuven, Belgium 2 Metallurgy and Materials Engineering, K.U.Leuven, Leuven, Belgium 3 UHasselt, Hasselt, Belgium ABSTRACT In this work stacked boron doped poly-crystalline Silicon-Germanium (poly-SiGe) layers, which can be applied as structural MEMS layers, were studied. A standard 1 µm base layer, deposited at 480 ºC chuck temperature, is stacked until the required thickness (e.g. 10 x for a 10 µm thick layer). This 1 µm base layer consists of a PECVD seed layer (+/- 75 nm), a CVD crystallization layer (+/- 135 nm) and a PECVD layer to achieve the required thickness with a high growth-rate. The top part of this PECVD layer can optionally be used for optimizing the stress gradient by a stress compensation layer. This approach resulted in 4 µm thick poly-SiGe MEMS structural layers with low tensile stress (50 MPa), low resistivity (2 mΩcm) and a low strain gradient (< 1*10-5/µm). INTRODUCTION Poly-crystalline silicon-germanium (poly-SiGe) has already shown its potential for integrating MEMS and CMOS in a MEMS-last approach [1, 2]. Both CVD [1] and faster PECVD-based processes [2, 3] at CMOS-compatible temperatures have been reported in literature. The effect of the deposition parameters on the stress gradient of both CVD and PECVD poly-SiGe layers was reported [4]. In this work the effect of the deposition parameters on the material properties of a 1 µm thick combined CVD and PECVD layer is studied. Thicker structural layers are achieved by stacking a standard 1 µm thick base layer until the required thickness. The strain gradient can be optimized by adding a stress compensation layer on top of the base layer [3]. The influence of the deposition parameters and the thickness of this stress compensation layer on the stress gradient of 1 µm layers is studied as well. While in previously reported work [5], this stress compensation layer was adjusted for each structural layer thickness, stacking has the advantage of overall lower strain gradients, and allows re-using the optimized base layer for different layer thickness. EXPERIMENTAL PROCEDURE Both CVD and PECVD SiGe layers were deposited at 4 Torr in an Applied Materials Centura CxZ chamber on eight-inch silicon wafers (100) having a 1500 nm thick annealed TEOS-based SiO2 layer on top. Prior to deposition a short conditioning of the chamber with a H2 flow is performed. A gas flow of 10% germane (GeH4) in H2 was used as germanium (Ge) source. The silicon source was a flow of pure silane (SiH4). This silane flow controls the Ge concentration, as the GeH4 flow is kept constant. Doping of the layers was achieved by using a
constant flow of 1% diborane (B2H6) in H2 as boron (B) gas source (p-type SiGe). The PECVD and CVD films were grown at a chuck temperature of 480 ºC with 50
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