Technique of surface control with the Electrolyzed D.I.water for post CMP cleaning
- PDF / 312,543 Bytes
- 6 Pages / 595 x 842 pts (A4) Page_size
- 97 Downloads / 155 Views
Technique of surface control with the Electrolyzed D.I.water for post CMP cleaning Mitsuhiko Shirakashi*, Kenya Itoh*, Ichiro Katakabe*, Masayuki Kamezawa*, Sachiko Kihara*, Manabu Tsujimura*, Takayuki Saitoh**, Kaoru Yamada**, Naoto Miyashita***, Masako Kodera***, Yoshitaka Matsui*** * Precision Machinery Group, Ebara Corporation 4-2-1,Honfujisawa, Fujisawa-shi 251-8502, Kanagawa, Japan ** Center of Technology Development, Ebara Research CO., Ltd. 4-2-1,Honfujisawa, Fujisawa-shi 251-8502, Kanagawa, Japan *** Manufacturing Engineering Center, Toshiba Corporation Semiconductor Company 8,Shinsugita-cho, Isogo-ku, Yokohama 235-8522, Kanagawa, Japan ABSTRACT Chemical mechanical planarization (CMP) has been widely used for planarization of ILD, STI, plug and wiring processes. Wafer has several surfaces of materials, such as wiring materials, barrier materials, dielectric materials etc., that must be cleaned at the same time. In post metal CMP cleaning processes, in addition to cleaning several surfaces, it is very important that the oxidization level of metal materials, such as wiring, is held and controlled to maintain its resistance. Especially copper, that is began to use for wiring, is very easy to be oxidized. We have confirmed that the Electrolyzed D.I.water is effective in post Cu CMP cleaning for controlling the surface condition of Cu during cleaning and leaving a robust surface after CMP. We describe the Electrolyzed D.I.water system and present some result of analysis of Cu surface by treated with the Electrolyzed D.I.water. INTRODUCTION Wet processes such as CMP and electrochemical deposition (ECD) have recently received a tremendous amount of attention in the semiconductor industry in accordance with the progressive down sizing of the technical node on semiconductor devices. The integration of these processes into the semiconductor industry is primarily for the superior planarity (CMP) or gap filling (ECD) capabilities compared to the existing dry processes. The main reason why such wet processes have not been adopted into semiconductor processing in the past has been because wet processing has been considered “dirty” both from a process perspective and from a tool design perspective. The recent acceptance of wet processes and tools into semiconductor processing facilities is due to the recognition that such processes can be done at lower temperatures ( DIW Rinse
DHF
Spin Dry
DIW with Ultrasonic
Figure 4 : Procedure of experiment
RESULTS AND DISCUSSION In order to confirm the surface control by Anode water, the level of copper oxidization was analyzed by XPS. After four kinds of cleaning treatments, (1)D.I.water (2)O3 water (3)O2 water (4)Anode water, XPS results were obtained and compared on wafers 24 hours and 2 weeks after cleaning. E8.3.3
Cu 2p
< after a day >
< after 2weeks >
CuO
Cu2O+Cu
CuO
Cu2O+Cu
Reference
O3 water
O2 water
Anode water
Figure 5 : Results of Cu2p spectrum analyses by XPS
Auger
< after a day > Cu2O +Cu(OH)2
< after 2weeks >
CuO+Cu
Reference
O3 water
O2 wat
Data Loading...