The Effect of Multiple Interfaces on the Electrical Properties of MgO/Al 2 O 3 Multilayer Gate Stacks on Si Grown by MBE
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The Effect of Multiple Interfaces on the Electrical Properties of MgO/Al2O3 Multilayer Gate Stacks on Si Grown by MBE Chen-Yi Su1, Mariela Menghini1, Jin Won Seo2 and Jean-Pierre Locquet1 1 Department of Physics and Astronomy, KU Leuven, Leuven, Belgium 2 Department of Metallurgy and Materials Engineering, KU Leuven, Leuven, Belgium ABSTRACT High-κ and metal gate structures have been used to improve the performance of CMOS devices. By changing the materials and structures of the gate dielectric stacks, the flatband voltage (VFB) and the leakage can be changed. We used bilayers and multilayer structures composed of MgO and Al2O3 to verify their influence on the overall electrical properties. Films with an MgO bottom layer generally are found with less flatband voltage shift and lower leakage than with an Al2O3 bottom layer. Also, the frequency dispersion and the interface state density (Dit) are higher for those with MgO bottom layers. MgO films thicker than 0.5 nm effectively shields the positive charges present in the Al2O3. INTRODUCTION To achieve high performance in future low power devices, a low threshold voltage, a high capacitance and a low leakage current are all of critical importance in CMOS technology. These electrical properties are strongly related to the interface between the dielectric layer and the semiconductor. Defects such as Dit and oxide charges are known as the main causes of the C-V curve distortion and they also influence the different I-V transport mechanisms. The conventional transistors are composed by poly silicon contacts on silicon oxide gate stacks. In that case, the flatband voltage can be easily modulated through the dopant in poly silicon thanks to the dependence of the Fermi-level on dopant concentration and defect free interface between SiO2 and the substrate. In order to eliminate the additional depletion capacitance from the poly silicon and to further increase the overall capacitance, metal gates and high-k oxides are introduced. The purpose is to keep a high capacitance with a low leakage current in order to reach low power consumption of scaled devices. However, the metal work function cannot be tuned as freely as in the case of poly silicon. Moreover, charges, dipoles and defects often exist at the interfaces between the metal and oxide layers, which can shift the VFB. The resultant VFB needs to be shifted to the appropriate position for band alignment. Therefore, a control of the flatband voltage while keeping reasonably low leakage and interface states remain an important research topic. Many studies have been devoted to add extra dielectric layers in the gate stack for flatband voltage modulation. Iwamoto et al. 1] inserted Al2O3 or Y2O3 as a top or bottom layer on HfO2 based gate stacks. The authors found that the flatband voltage is mainly determined by the interface between the high-κ oxide and the silicon oxide interlayer, while the thickness of the bottom oxide layer also plays a role. Al2O3 and MgO are both insulators with a medium dielectric constant (9 – 9.8) and
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