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Abstract In this paper, experimental results for electromigration void morphology and failure time distribution are presented as a function of test condition, grain size distribution and conductor linewidth. Unpassivated AI-Cu(1.5%)-Si(1.5%) conductors with linewidths in the range 1grm < W < 10gm were subjected to accelerated temperature stresses of T=150° C and 250'C and current stresses in the range j=0.5-4x10 6 A-cm"2, for each temperature stress. Unlike previous reports, erosion-like voids dominated at all current densities and temperatures for both W/D50 •- 1 and W/D 50 > 1. The void distribution within a line was strongly dependent on test conditions and linewidth. The critical current density was extracted from electromigration lifetimes measured as a function of current density. The results show that the linewidth dependence of electromigration lifetimes depend strongly on the Blech relation.

Introduction Typically, characterization of VLSI metallization reliability relies on electromigration testing. The results of such testing are becoming ever more important as process technologies shrink to accommodate increasingly complex circuit designs. In order to provide timely feedback for process development teams, electrical and thermal test conditions that exceed safe circuit operation are used to induce failure. These stress levels help realize shorter test times. However, recent findings indicate a need for caution in their use because of differences between void morphologies observed under operational and accelerated conditions 1 . Several researchers have presented experimental evidence that strongly suggests a relationship between electromigration failure morphology, test conditions and film microstructure relative to conductor geometry 2- 4 . In particular, Artz et al. observed slit voids, often transgranular (TG), as a dominant failure mode in unpassivated Al and AlCuSi for current densities less than 2x10 6 A cm-2 and 2

W/D50 •- 1; they also presented a theoretical 'damage map' predicting similar results . Failures

exhibiting slit-like behavior have also been observed in passivated structures for various Al based conductors 1. While different damage morphologies have been identified as potential sources for failure in conductors of various geometries, significant disagreement remains over what constitutes an erosion type void versus a slit-like void, the kinetics governing the formation of these void types and whether these voids are actually the same. In this paper, we present experimental results on the effect of test condition on failure morphology for polygrain and near-bamboo conductors. The dependence of the failure time distribution on current density and the current density threshold product 5 are discussed in relation to the observed void morphology. Experimental Details Electromigration test structures were fabricated on Si substrates by sputtering 8kA of A1-Cu(1.5%)Si(1.5%) at 270°C on 8kA of BPSG. The test structures were formed using conventional photolithography and reactive ion etch pr