The Novel Technique of Nanometer-Size Fabrication by Using Conventional Photolithography

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a nanometer region of metals is oxidized using a tip of a scanning tunneling microscope (STM)[1]. When an STM tip is scanned on the surface of the metals, the precise area of the scanned region is oxidized with a width of about 10nm. This technology is used for fabrication of single electron transistor (SET)[2]. However, this does not appear as an industrially acceptable technique. If a conventional lithographic technique such as photolithography can be applied to fabricate such nanometer-size structures, it would be highly useful. In this study a new nano-technology utilizing conventional photolithography is proposed and then a contact pattern-mask with nanometer-size slits is fabricated by combination of conventional photo-lithography and anodic oxidation of side-wall of metal [3]. The mask of a 10nm slit width is fabricated by this technique, and a nanometer-size trench is fabricated in the Si substrate by using such a slit-mask. The technique might be useful for fabrication of the nano-scale devices such as SET and metal/insulator tunnel transistor(MITT) [4] at mass-production level.

313 Mat. Res. Soc. Symp. Proc. Vol. 584 © 2000 Materials Research Society

EXPERIMENTAL

TiOx Anodic Soxidation

RIE

(.e•

Si(I1(1)

(a)

(c)

(b)

Deposition

Ti

TiO X Nanometer Wet etching

~slit



(e)

(d)

(f)

Fig. 1: Fabrication processes of the nanometer pattern-mask

421 (a)

RIE

-Ti

"CeO2

"a ___ (b)

(c)

(d)

Fig.2: Fabrication processes of the nanometer-size trench Fabrication of the nanometer pattern-mask Figure 1 shows the fabrication processes of the nanometer pattern-mask. Firstly, the Cerium oxide(CeO 2 ;ceria) layer is deposited on a Si(111) substrate by RF(Radio Frequency) sputtering method. It is expected that CeO 2 can adhere on Si(111) substrate strongly. CeO 2 is used as an interlayer to protect the substrate from the following fabrication processes. Additionally, the CeO 2 can be etched selectively for Ti of the pattern-mask when the substrate is fabricated. The Ti layer is deposited by vacuum evaporation on the CeO 2 layer. Then, photoresist is coated on it and a part of it is removed by photolithographic process, and the Ti is exposed (Fig.l(a)). The exposed Ti layer is etched vertically by reactive ion etching(RIE) using a mixture of chlorine(C12) and boron trichloride(BCl 3 ) (Fig.l(b)). The steep side-edge of the Ti layer under the resist is oxidized laterally to convert to titanium oxide(TiO.) in ethylene glycol dissolved ammonium tetraborate (20.2 wt.%,24 OC)(Fig.l(c)). The thickness of titanium oxide TiOX obtained by anodic oxidation can be controlled in the ranges of several-tens of nanometer by changing the anodic

314

voltage. Actually, it is found that the thickness of TiO. is expressed by the relation of 2nm/V[3]. The Ti layer is deposited again over the whole surface(Fig.1(d)). And the metal/insulator/metal(MIM)structure is obtained after the Ti layer over the resist is removed by a lift-off technology(Fig.1(e)). Then, the TiO, is etched by H2 SO 4 /H 20 2 solution, and thus a pattern