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S.F. Wang Department of Materials and Minerals Resources Engineering, National Taipei University of Technology, Taipei 106, Taiwan, Republic of China (Received 31 January 2003; accepted 20 March 2003)

This paper describes studies on the thermal annealing behavior of Cu films with 2.3 at.% W deposited on Si substrates. The magnetron cosputtered Cu films with insoluble W were vacuum annealed at temperatures ranging from 200 to 800 °C. Twins were observed in focused ion beam and transmission electron microscopy images of as-deposited and 400 °C annealed pure Cu film, and these twins were attributed to the intrinsic low stacking fault energy. Twins in pure Cu film may provide an additional diffusion path during annealing for copper silicide formation. The beneficial effect of W on the thermal stability of Cu film was supported by the following observations: (i) x-ray diffraction studies show that Cu4Si was formed at 530 °C in Cu–W film, whereas pure Cu film exhibited Cu4Si growth at 400 °C; (ii) shallow diffusion profiles for Cu into Si in Cu–W film through secondary ion mass spectroscopy analyses, and the high activation energy needed for the copper silicide formation from the differential scanning calorimetry study; (iii) addition of W in Cu film increases the stacking fault energy and results in a low twin density.

I. INTRODUCTION

In recent years, the use of copper in microelectronic device interconnections has increased interest in finding ways to improve thermal stability of Cu with Si. Because of fewer electromigration problems than aluminum alloys and its renowned low resistivity value that makes higher device speeds possible to achieve, Cu is very attractive as an interconnection material in semiconductor devices.1–3 Yet one of the disadvantages of using Cu as an interconnection material is the rapid diffusion of Cu into SiO2 or Si substrates at elevated temperatures and formation of copper silicides at the interface during device fabrication.4,5 Copper silicide layers with high electrical resistivity cause delay in time, which results in the generation of heat and may eventually cause a breakdown of the p-n junction.6 Therefore, a diffusion barrier layer between Cu and the Si substrate is commonly used in microelectronic devices. a)

Permanent address: Department of Electronic Materials, ChinMin College, Tou-Fen 351, Taiwan, Republic of China. b) Address all correspondence to this author. e-mail: [email protected] c) Permanent address: Department of Physics, Alagappa University, Karaikudi-630 003, India. J. Mater. Res., Vol. 18, No. 6, Jun 2003

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Alternatively, thermal stability improvement of the Cu film and retardation of the copper silicide formation were considered. Harper et al. reported that in situ oxygen dosing during deposition of Ta and Cu increased the failure temperature after annealing.7 They further estimated the resistivity of evaporated Cu films with dilute insoluble elements and found that it is closer to the resistivity of pure co