Transactions on High-Performance Embedded Architectures and Compilers II
Transactions on HiPEAC aims at the timely dissemination of research contributions in computer architecture and compilation methods for high-performance embedded computer systems. Recognizing the convergence of embedded and general-purpose computer systems
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Transactions on
LNCS 5470
High-Performance Embedded Architectures and Compilers II Per Stenström Editor-in-Chief
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Lecture Notes in Computer Science Commenced Publication in 1973 Founding and Former Series Editors: Gerhard Goos, Juris Hartmanis, and Jan van Leeuwen
Editorial Board David Hutchison Lancaster University, UK Takeo Kanade Carnegie Mellon University, Pittsburgh, PA, USA Josef Kittler University of Surrey, Guildford, UK Jon M. Kleinberg Cornell University, Ithaca, NY, USA Alfred Kobsa University of California, Irvine, CA, USA Friedemann Mattern ETH Zurich, Switzerland John C. Mitchell Stanford University, CA, USA Moni Naor Weizmann Institute of Science, Rehovot, Israel Oscar Nierstrasz University of Bern, Switzerland C. Pandu Rangan Indian Institute of Technology, Madras, India Bernhard Steffen University of Dortmund, Germany Madhu Sudan Massachusetts Institute of Technology, MA, USA Demetri Terzopoulos University of California, Los Angeles, CA, USA Doug Tygar University of California, Berkeley, CA, USA Gerhard Weikum Max-Planck Institute of Computer Science, Saarbruecken, Germany
5470
Per Stenström (Ed.)
Transactions on High-Performance Embedded Architectures and Compilers II
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Volume Editor Per Stenström Chalmers University of Technology Department of Computer Science and Engineering 412 96 Gothenburg, Sweden E-mail: [email protected]
Library of Congress Control Number: Applied for CR Subject Classification (1998): B.2, C.1, D.3.4, B.5, C.2, D.4
ISSN ISSN ISBN-10 ISBN-13
0302-9743 (Lecture Notes in Computer Science) 1861-306X (Transactions on HiPEAC) 3-642-00903-4 Springer Berlin Heidelberg New York 978-3-642-00903-7 Springer Berlin Heidelberg New York
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Editor-in-Chief’s Message
It is my pleasure to introduce the second volume of Transactions on HighPerformance Embedded Architectures and Compilers. This journal was created as an archive for scientific articles in the converging fields of high-performance and embedded computer architectures and compiler systems. Design considerations in both general-purpose and embedded systems are increasingly being based on similar scientific insights. For example, a state-of-the-art game console today consists of a powerful parallel computer whos
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