Vertically Aligned Carbon Nanotubes Formed Using dc PECVD as Switching Elements for Extreme Environment Space Electronic
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1081-P15-06
Vertically aligned carbon nanotubes formed using dc PECVD as switching elements for extreme environment space electronics Anupama B Kaul, Robert Kowalczyk, Krikor Megerian, Paul von Allmen, and Richard L Baron Jet Propulsion Laboratory, California Institute of Technology, 4800 Oak Grove Drive, Pasadena, CA, 91109-8099
ABSTRACT Vertically aligned carbon nanotube (CNT) nano-electro-mechanical (NEM) switches are currently being investigated for their application in radiation-hard, high temperature space electronics. Carbon nanotubes are attractive for switching applications since electrostaticallyactuated CNT switches have low actuation voltages and power requirements, while allowing GHz switching speeds that stem from the inherently high elastic modulus and low mass of the CNT. Our NEM structure consists of CNTs that are grown using dc plasma-enhanced (PE) chemical-vapor-deposition (CVD) for forming vertically aligned, rigid tubes. A gas mixture of acetylene and ammonia were used for tube growth at a total pressure of a few Torr and temperatures up to 700 ºC. We have formed arrays of single, vertically aligned tubes directly on Si, which was enabled by this first report of an optical lithography approach used to generate isolated tubes compared to e-beam lithography that is conventionally used. Vertical NEM switch devices were formed where single, vertically aligned tubes were seen within deep trenches, in close proximity to conducting electrodes. INTRODUCTION Carbon nanotubes (CNTs) have remarkable mechanical and electrical properties which makes them excellent candidates for the design of nanoelectromechanical systems (NEMS). Nanotube based NEMS have already been demonstrated in applications ranging from nanotweezers,1 memory devices,2 supersensitive sensors3 and tunable oscillators.4 Nanorelays5,6 are another promising application of nanotubes that offer the potential for high performance switching, with high speed operation at low actuation voltages and power. At the same time, Si-based transistors for computing and memory applications are now facing major challenges due to continued miniaturization. For example, at the 65 nm lithography node, more than half of the total power is lost to static dissipation, posing a limit on the maximum dynamic power and hence processor speeds. Static losses will consume 100% of the power budget within a few years,7 and by 2014 at the 20 nm lithography node, the equivalent of only 8 electrons will distinguish the ON and OFF states in a Si transistor making them susceptible to noise and thermal fluctuations. Contrary to Si-based transistors, NEM devices, such as that described here, offer reduced OFF state currents since conduction paths are physically isolated. Their inherently nanometer-scale dimensions offer higher densities and higher speeds of operation at much lower power levels. Besides addressing scalability issues associated with Moore’s law, such switches would be beneficial to NASA’s future planetary missions by providing more hardened electronics that are
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